公开(公告)号：US20230320227A1

公开(公告)日：2023-10-05

申请号：US17707078

申请日：2022-03-29

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： CHING-HUI LIN ,  FU-CHUN HUANG ,  CHUN-REN CHENG ,  WEI CHUN WANG ,  CHAO-HUNG CHU ,  YI-HSIEN CHANG ,  PO-CHEN YEH ,  CHI-YUAN SHIH ,  SHIH-FEN HUANG ,  YAN-JIE LIAO ,  SHENG KAI YEH

IPC: H01L41/047 ,  H01L41/083 ,  H01L41/27 ,  H01G5/18

CPC classification number: H01L41/0477 ,  H01G5/18 ,  H01L41/27 ,  H01L41/083

Abstract: A method for manufacturing a semiconductor structure is provided. The method may include several operations. A piezoelectric capacitor is formed over a substrate, wherein the piezoelectric capacitor includes a metal electrode. An intermediate layer is formed on the metal electrode, and is patterned using a first mask layer as a mask. A metal layer is formed on the intermediate layer, wherein the metal layer electrically connects to the metal electrode. The metal layer is patterned using a second mask layer, wherein the intermediate layer is within a coverage area of the metal layer from a top-view perspective after the patterning of the metal layer. A semiconductor structure thereof is also provided.

公开(公告)号：US20240381776A1

公开(公告)日：2024-11-14

申请号：US18315477

申请日：2023-05-10

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： SHENG KAI YEH ,  CHI-YUAN SHIH ,  SHIH-FEN HUANG ,  WEI CHUN WANG ,  SHAO-DA WANG

IPC: H10N30/20 ,  H10N30/082 ,  H10N30/50

Abstract: A semiconductor structure includes a substrate, a piezoelectric layer, and a stress structure. The substrate includes a first surface and a second surface, wherein a portion of the substrate proximal to the first surface defines a diaphragm. The piezoelectric layer is disposed over the first surface of the substrate and surrounds the diaphragm, wherein the piezoelectric layer includes a first portion and a second portion arranged along a periphery of the diaphragm from a top view. The stress structure includes a plurality of dielectric layers disposed over the piezoelectric layer and between the substrate and the piezoelectric layer, and a total thickness of a first portion of the stress structure overlapping the first portion of the piezoelectric layer is different from a total thickness of a second portion of the stress structure overlapping the second portion of the piezoelectric layer. A method for manufacturing a semiconductor structure is also provided.

公开(公告)号：US20240050987A1

公开(公告)日：2024-02-15

申请号：US17819044

申请日：2022-08-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： MING-HSIEN YANG ,  CHUN-HAO CHOU ,  KUO-CHENG LEE ,  SHENG KAI YEH

IPC: B06B1/02 ,  B06B1/06

CPC classification number: B06B1/0292 ,  B06B1/0666 ,  B06B2201/76 ,  A61B5/0095

Abstract: A semiconductor device and a method are provided. The semiconductor device includes a first semiconductor component, a bonding layer and a second semiconductor component. The first semiconductor component includes a first transistor formed on a substrate and a second transistor formed on the substrate and separated from the first transistor. The bonding layer is provided on the first semiconductor component. The second semiconductor component is provided on the bonding layer and includes an acoustic transducer. The acoustic transducer is controlled by the first transistor and the second transistor to execute a photoacoustic sensing. The acoustic transducer comprises a space gap and a least a portion of the space gap is surrounded by the bonding layer.