公开(公告)号：US09230852B2

公开(公告)日：2016-01-05

申请号：US13775484

申请日：2013-02-25

Applicant: Texas Instruments Incorporated ,  TEXAS INSTRUMENTS DEUTSCHLAND GmbH

Inventor： Helmut Rinck ,  Fromund Metz ,  Jan Hermann Pape ,  Janet Riley

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/00 ,  H01L23/34 ,  H01L23/552 ,  H01L23/31 ,  H01L23/367

CPC classification number: H01L21/768 ,  H01L23/3171 ,  H01L23/34 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/552 ,  H01L24/05 ,  H01L2224/05554 ,  H01L2924/1461 ,  H01L2924/00

Abstract: An integrated circuit (IC) die has a top side surface providing circuitry including active circuitry configured to provide a function, including at least one bond pad formed from a bond pad metal coupled to a node in the circuitry. A dielectric passivation layer is over a top side surface of a substrate providing a contact area which exposes the bond pad. A metal capping layer includes an electrically conductive metal or an electrically conductive metal compound over at least the contact area to provide corrosion protection to the bond pad metal, which is in electrical contact with the bond pad metal. The metal capping layer can extend over structures other than the bond pads, such as to cover at least 80% of the area of the IC die to provide structures on the IC die protection from incident radiation.

Abstract translation: 集成电路（IC）管芯具有顶侧表面提供电路，其包括被配置为提供功能的有源电路，所述功能包括由耦合到所述电路中的节点的接合焊盘金属片形成的至少一个接合焊盘。 电介质钝化层位于衬底的顶侧表面上，提供暴露接合焊盘的接触区域。 金属覆盖层包括在至少接触区域上的导电金属或导电金属化合物，以向与接合焊盘金属电接触的接合焊盘金属提供腐蚀保护。 金属覆盖层可以在结合焊盘之外的结构上延伸，例如覆盖IC芯片的至少80％的面积，以提供IC芯片上的结构，防止入射辐射。

公开(公告)号：US10297497B2

公开(公告)日：2019-05-21

申请号：US15658039

申请日：2017-07-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sebastian Meier ,  Helmut Rinck ,  Kai-Alexander Schachtschneider ,  Fromund Metz ,  Mario Schmidpeter ,  Javier Gustavo Moreira

IPC: H01L21/285 ,  H01L21/311 ,  H01L21/768 ,  H01L21/3213

Abstract: In accordance with at least one embodiment of the disclosure, a method of patterning platinum on a substrate is disclosed. In an embodiment, an adhesive layer is deposited over the substrate, a sacrificial layer is deposited over the adhesive layer, and a patterned photoresist layer is formed over the sacrificial layer. Then, the sacrificial layer is patterned utilizing the photoresist layer as a mask such that at least a portion of the adhesive layer is exposed. Subsequently, the top and sidewall surfaces of the patterned sacrificial layer and the first portion of the adhesive layer are covered by a platinum layer. Finally, the sacrificial layer and a portion of the platinum layer covering the top and sidewall surfaces of the sacrificial layer are etched, thereby leaving a remaining portion of the platinum layer to form a patterned platinum layer on the substrate.