公开(公告)号：US20190186897A1

公开(公告)日：2019-06-20

申请号：US15848157

申请日：2017-12-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hung-Yu CHOU ,  Chien-Hao WANG ,  Tse-Tsun CHIU ,  Fu-Kang LEE ,  Liang-Kang SU

IPC: G01B11/06 ,  G01B11/16 ,  G01B11/28 ,  G01B11/30

CPC classification number: G01B11/0625 ,  G01B11/162 ,  G01B11/285 ,  G01B11/303 ,  G01N21/00

Abstract: A method for evaluating a leadframe surface includes positioning a leadframe on a measurement apparatus at a first predetermined distance relative to an end portion of a light source of an optical sensor; irradiating a predetermined area on a surface of the leadframe with light having a single predetermined wavelength from the light source; receiving, with a light receiver of the optical sensor, reflected light from the predetermined area on the surface of the leadframe, and converting the reflected light into an electric signal; determining a reflection intensity value of the predetermined area on the surface of the leadframe based on the electric signal; and calculating a reflection ratio of the predetermined area on the surface of the leadframe based on the reflection intensity value and a predetermined reference reflection intensity value associated with the light source.

公开(公告)号：US20230063262A1

公开(公告)日：2023-03-02

申请号：US17463124

申请日：2021-08-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Chung-Hao LIN ,  Hung-Yu CHOU ,  Bo-Hsun PAN ,  Dong-Ren PENG ,  Pi-Chiang HUANG ,  Yuh-Harng CHIEN

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: In some examples a semiconductor chip package includes a conductive terminal. In addition, the semiconductor chip package includes a die pad including a top side and a recess extending into the top side. The die pad is downset relative to the conductive terminal. Further, the semiconductor ship package includes a semiconductor die positioned within the recess, wherein the semiconductor die has an outer perimeter, and a solder fillet engaged within the recess and with the outer perimeter of the semiconductor die. Still further, the semiconductor chip package includes a wire bond coupled to the semiconductor die and the conductive terminal, and a mold compound covering the conductive terminal, the wire bond, the die pad, and the semiconductor die.

公开(公告)号：US20190206769A1

公开(公告)日：2019-07-04

申请号：US15856346

申请日：2017-12-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yuh-Harng CHIEN ,  Hung-Yu CHOU ,  Fu-Kang LEE

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/544 ,  H01L25/065

CPC classification number: H01L23/49544 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/544 ,  H01L24/48 ,  H01L24/85 ,  H01L25/0655 ,  H01L2223/54426 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/85122 ,  H01L2224/85201 ,  H01L2924/35 ,  H01L2924/37001 ,  H01L2924/386

Abstract: Aspects of the disclosure relate generally to semiconductor packaging, and specifically to semiconductor device having a lead frame having a semiconductor supporting die pad that is capable of engaging with a wire bonding clamp.

公开(公告)号：US20210375640A1

公开(公告)日：2021-12-02

申请号：US17401057

申请日：2021-08-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yuh-Harng CHIEN ,  Hung-Yu CHOU ,  Fu-Kang LEE ,  Steven Alfred KUMMERL

IPC: H01L21/48 ,  H01L23/495 ,  H01L23/62 ,  H01L23/00

Abstract: An integrated circuit package having a shunt resistor with at least one self-aligning member that protrudes from a first surface, and a lead frame with at least one self-aligning feature that is a cavity within which the at least one self-aligning member is located, and an integrated circuit located on the lead frame.

公开(公告)号：US20210118779A1

公开(公告)日：2021-04-22

申请号：US16660713

申请日：2019-10-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hung-Yu CHOU ,  Chi-Chen CHIEN ,  Yuh-Harng CHIEN ,  Steven Alfred KUMMERL ,  Bo-Hsun PAN ,  Fu-Hua YU

IPC: H01L23/495 ,  H01L21/56 ,  H01L21/48 ,  H01L23/498 ,  H01L23/31 ,  H01L23/522

Abstract: In some examples, a semiconductor package comprises a lead frame. The lead frame includes a first row of leads; a first pad coupled to the first row of leads; a second row of leads; and a second pad coupled to the second row of leads, the first and second pads separated by a gap. The semiconductor package includes a heat-generating device coupled to the first and second pads and exposed to an exterior of the semiconductor package.

公开(公告)号：US20230395472A1

公开(公告)日：2023-12-07

申请号：US18453999

申请日：2023-08-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hung-Yu CHOU ,  Bo-Hsun PAN ,  Yuh-Harng CHIEN ,  Fu-Hua YU ,  Steven Alfred KUMMERL ,  Jie CHEN ,  Rajen M. MURUGAN

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/31 ,  H01L21/48

CPC classification number: H01L23/49568 ,  H01L21/565 ,  H01L21/4821 ,  H01L23/49503 ,  H01L23/3107

Abstract: In an example, an apparatus comprises a lead frame that includes a first row of leads, a first pad coupled to th first row of leads, and a second row of leads parallel to the first row of leads. The lead frame also includes a second pad coupled to the second row of leads. The first and second pads are separated by a gap, and each of the first and second pads has a substantially uniform thickness. The apparatus also includes a device coupled to the first and second pads. The first and second pads are exposed to an exterior of the apparatus.

公开(公告)号：US20190355652A1

公开(公告)日：2019-11-21

申请号：US16206640

申请日：2018-11-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hung-Yu CHOU ,  Bo-Hsun PAN ,  Yuh-Harng CHIEN ,  Fu-Hua YU ,  Steven Alfred KUMMERL ,  Jie CHEN ,  Rajen M. MURUGAN

IPC: H01L23/495 ,  H01L21/56 ,  H01L21/48 ,  H01L23/31

Abstract: In an example, an apparatus comprises a lead frame that includes a first row of leads, a first pad coupled to the first row of leads, and a second row of leads parallel to the first row of leads. The lead frame also includes a second pad coupled to the second row of leads. The first and second pads are separated by a gap, and each of the first and second pads has a substantially uniform thickness. The apparatus also includes a device coupled to the first and second pads. The first and second pads are exposed to an exterior of the apparatus.

公开(公告)号：US20190326131A1

公开(公告)日：2019-10-24

申请号：US16459184

申请日：2019-07-01

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yuh-Harng CHIEN ,  Hung-Yu CHOU ,  Fu-Kang LEE ,  Steven Alfred KUMMERL

IPC: H01L21/48 ,  H01L23/495

Abstract: An integrated circuit package having a shunt resistor with at least one self-aligning member that protrudes from a first surface, and a lead frame with at least one self-aligning feature that is a cavity within which the at least one self-aligning member is located, and an integrated circuit located on the lead frame.

公开(公告)号：US20190206699A1

公开(公告)日：2019-07-04

申请号：US15857988

申请日：2017-12-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yuh-Harng CHIEN ,  Hung-Yu CHOU ,  Fu-Kang LEE ,  Steven Alfred KUMMERL

IPC: H01L21/48 ,  H01L23/495

CPC classification number: H01L21/4825 ,  H01L21/4842 ,  H01L23/49517 ,  H01L23/49548

Abstract: An integrated circuit package having a shunt resistor with at least one self-aligning member that protrudes from a first surface, and a lead frame with at least one self-aligning feature that is a cavity within which the at least one self-aligning member is located, and an integrated circuit located on the lead frame.