公开(公告)号：US20240126703A1

公开(公告)日：2024-04-18

申请号：US18389899

申请日：2023-12-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Timothy D. ANDERSON ,  Joseph Raymond Michael ZBICIAK ,  Kai CHIRCA ,  Daniel Brad WU

IPC: G06F12/1027 ,  G06F9/46 ,  G06F9/48 ,  G06F12/0862 ,  G06F12/0882 ,  G06F12/0891 ,  G06F12/1009 ,  H03M13/15

CPC classification number: G06F12/1027 ,  G06F9/467 ,  G06F9/4881 ,  G06F12/0862 ,  G06F12/0882 ,  G06F12/0891 ,  G06F12/1009 ,  H03M13/1575 ,  G06F2212/1021 ,  G06F2212/602 ,  G06F2212/68

Abstract: A method includes receiving, by a memory management unit (MMU) comprising a translation lookaside buffer (TLB) and a configuration register, a request from a processor core to directly modify an entry in the TLB. The method also includes, responsive to the configuration register having a first value, operating the MMU in a software-managed mode by modifying the entry in the TLB according to the request. The method further includes, responsive to the configuration register having a second value, operating the MMU in a hardware-managed mode by denying the request.

公开(公告)号：US20210109868A1

公开(公告)日：2021-04-15

申请号：US17068730

申请日：2020-10-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Timothy D. ANDERSON ,  Joseph Raymond Michael ZBICIAK ,  Kai CHIRCA ,  Daniel Brad WU

IPC: G06F12/1027 ,  G06F12/1009 ,  G06F12/0882 ,  G06F12/0891

Abstract: A method includes receiving, by a memory management unit (MMU) comprising a translation lookaside buffer (TLB) and a configuration register, a request from a processor core to directly modify an entry in the TLB. The method also includes, responsive to the configuration register having a first value, operating the MMU in a software-managed mode by modifying the entry in the TLB according to the request. The method further includes, responsive to the configuration register having a second value, operating the MMU in a hardware-managed mode by denying the request.