公开(公告)号：US20240178838A1

公开(公告)日：2024-05-30

申请号：US18058988

申请日：2022-11-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Atul Kumar AGRAWAL ,  Abhijit Patki ,  Shaik BASHA

IPC: H03K19/00 ,  G06F3/16 ,  H03K5/01 ,  H03K19/21 ,  H04R3/00 ,  H04R3/12

CPC classification number: H03K19/0002 ,  G06F3/162 ,  H03K5/01 ,  H03K19/21 ,  H04R3/005 ,  H04R3/12 ,  H03K2005/00013

Abstract: An integrated circuit (IC) includes a tristatable output buffer having a control input. The IC includes an input buffer having a buffer output. The IC further includes a delay circuit having a delay circuit input, a first delay circuit output, and a second delay circuit output. The delay circuit input is coupled to the buffer output. The IC also includes a tristate circuit coupled to the first delay circuit output and to the second delay circuit output. The tristate circuit having a tristate circuit output coupled to the control input.

公开(公告)号：US20240297643A1

公开(公告)日：2024-09-05

申请号：US18241025

申请日：2023-08-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shaik BASHA ,  Rejin KANJAVALAPPIL RAVEENDRANATH ,  Asish DAS

IPC: H03K17/08

CPC classification number: H03K17/08 ,  H03K19/21 ,  H04R3/007

Abstract: A circuit includes a driver circuit. The driver circuit includes a power stage and an overcurrent control circuit. The power stage includes an output switch. The overcurrent control circuit includes a switch control circuitry and overcurrent detection circuitry. The switch control circuitry is configured to: receive a first control signal; and provide a second control signal to a control terminal of the output switch responsive to a delay interval relative to the first control signal and overcurrent detection results obtained by the overcurrent detection circuitry during the delay interval.