摘要:
A wafer and a test method thereof are provided. The invention utilizes a first group of probes to perform a high voltage stress (HVS) test on a first chip, and utilizes a second group of probes to perform a function test on a second chip, where a period of the high voltage stress test overlaps a period of the function test, thereby greatly decreasing the test time of the wafer.
摘要:
A wafer, a test system thereof, a test method thereof and a test device thereof are provided. The present invention utilizes a first group of probes to perform a high voltage stress (HVS) test on a first chip, and utilizes a second group of probes to perform a function test on a second chip, where a period of the high voltage stress test overlaps a period of the function test, thereby greatly decreasing the test time of the wafer.
摘要:
A wafer, a test system thereof, a test method thereof and a test device thereof are provided. The present invention utilizes a first group of probes to perform a high voltage stress (HVS) test on a first chip, and utilizes a second group of probes to perform a function test on a second chip, where a period of the high voltage stress test overlaps a period of the function test, thereby greatly decreasing the test time of the wafer.
摘要:
A wafer and a test method thereof are provided. The invention utilizes a first group of probes to perform a high voltage stress (HVS) test on a first chip, and utilizes a second group of probes to perform a function test on a second chip, where a period of the high voltage stress test overlaps a period of the function test, thereby greatly decreasing the test time of the wafer.
摘要:
A data transmitting method for inputting a data signal to an electronic device. The data signal includes first and second sets of data, and the electronic device includes first to fourth receiving units and corresponding first to fourth registers. The transmitting method includes the following steps. First, the first and second receiving units are disabled. Then, the first set of data is inputted to the electronic device through the third and fourth receiving units and stored in the third and fourth registers during a first clock cycle of a clock signal. Thereafter, the second set of data is inputted to the electronic device through the third and fourth receiving units and stored in the third and fourth registers while the first set of data stored in the third and fourth registers is inputted to the first and second registers during a second clock cycle of the clock signal.
摘要:
A voltage level shift circuit is provided. The circuit includes an input buffer unit, a level shift unit and a voltage stabilizing capacitor. The input buffer is coupled between a first voltage source and a first ground terminal. The level shift unit is coupled between a second voltage source and a second ground terminal. An input terminal of the level shift unit is coupled to an output terminal of the input buffer unit. The voltage stabilizing capacitor is coupled between the first voltage source and the second ground terminal. When a state transition occurs in the level shift unit, the voltage stabilizing capacitor maintains a voltage difference between the output terminal of the input buffer unit and the second ground terminal.
摘要:
A voltage level shift circuit is provided. The circuit includes an input buffer unit, a level shift unit and a voltage stabilizing capacitor. The input buffer is coupled between a first voltage source and a first ground terminal. The level shift unit is coupled between a second voltage source and a second ground terminal. An input terminal of the level shift unit is coupled to an output terminal of the input buffer unit. The voltage stabilizing capacitor is coupled between the first voltage source and the second ground terminal. When a state transition occurs in the level shift unit, the voltage stabilizing capacitor maintains a voltage difference between the output terminal of the input buffer unit and the second ground terminal.
摘要:
First and second bits of pixel values of the display are received, and each of the first and second bits is forwarded through one of data signals. Then, levels of the data signals are shifted, and the forwarded first and second bits are received through the level-shifted data signals to convert the pixel values into analog voltages driving the display. The level-shifted data signals through which the forwarded first and second bits are received are generated in a first and second phase, respectively.
摘要:
In a pixel array, each column of the pixel array is coupled to one of a plurality of first and second channels of a driver. A first and second control signals are generated. Polarities of the first channels are inversed when a logic level of the first control signal changes and polarities of the second channels are inversed when a logic level of the second control signal changes. Only the logic level of one of the first and second control signals changes in response to each transition of scan periods.
摘要:
A display and a two step driving method thereof are provided. The method includes: converting an image signal to a corresponding data driving voltage by using a driver; providing a pre-driving voltage by using a voltage generator; and finally, driving the display panel by using the pre-driving voltage and data driving voltage orderly during a horizontal synchronizing period. A display includes a display panel, a voltage generator, and a driver. The display panel also includes at least one data line. The voltage generator outputs a pre-driving voltage to the data line of the display. The driver outputs a data driving voltage to the data line according to an image signal, in which the data line receives the pre-driving voltage and the data driving voltage orderly during the horizontal synchronizing period.