公开(公告)号：US07187078B2

公开(公告)日：2007-03-06

申请号：US10938594

申请日：2004-09-13

申请人： Tzu-Han Lin ,  Huei-Mei Yu ,  Chia-Jen Cheng ,  Chun-Yen Lo ,  Li-Hsin Tseng ,  Boe Su ,  Simon Lu

发明人： Tzu-Han Lin ,  Huei-Mei Yu ,  Chia-Jen Cheng ,  Chun-Yen Lo ,  Li-Hsin Tseng ,  Boe Su ,  Simon Lu

IPC分类号： H01L29/40

CPC分类号： H01L24/13 ,  H01L24/05 ,  H01L2224/02125 ,  H01L2224/05001 ,  H01L2224/05007 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05562 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/056 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012

摘要： Solder bump structures for semiconductor device packaging is provided. In one embodiment, a solder bump structure comprises a semiconductor substrate, the substrate has at least one contact pad and an upper passivation layer having at least one opening formed therein exposing a portion of the contact pad. At least one patterned and etched polymer layer is formed on a portion of the contact pad. At least one patterned and etched conductive metal layer is formed above the polymer layer and is aligned therewith. And at least one layer of solder material having a solder height is provided above the conductive metal layer, the layer of solder is aligned with the conductive metal layer, the layer of solder is thereafter reflown thereby creating a solder ball.

摘要翻译： 提供了用于半导体器件封装的焊接凸块结构。 在一个实施例中，焊料凸块结构包括半导体衬底，所述衬底具有至少一个接触焊盘和具有形成在其中的至少一个开口的上钝化层，其暴露接触焊盘的一部分。 在接触垫的一部分上形成至少一个图案化和蚀刻的聚合物层。 在聚合物层之上形成至少一个图案化和蚀刻的导电金属层并与其对准。 并且在导电金属层的上方设置至少一层具有焊料高度的焊料材料，该焊料层与导电金属层对准，此后焊料层被回流，从而形成焊球。

公开(公告)号：US20060055035A1

公开(公告)日：2006-03-16

申请号：US10938594

申请日：2004-09-13

申请人： Tzu-Han Lin ,  Huei-Mei Yu ,  Chia-Jen Cheng ,  Chun-Yen Lo ,  Li-Hsin Tseng ,  Boe Su ,  Simon Lu

发明人： Tzu-Han Lin ,  Huei-Mei Yu ,  Chia-Jen Cheng ,  Chun-Yen Lo ,  Li-Hsin Tseng ,  Boe Su ,  Simon Lu

IPC分类号： H01L23/48

CPC分类号： H01L24/13 ,  H01L24/05 ,  H01L2224/02125 ,  H01L2224/05001 ,  H01L2224/05007 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05562 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/056 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012

摘要： Solder bump structures for semiconductor device packaging is provided. In one embodiment, a solder bump structure comprises a semiconductor substrate, the substrate has at least one contact pad and an upper passivation layer having at least one opening formed therein exposing a portion of the contact pad. At least one patterned and etched polymer layer is formed on a portion of the contact pad. At least one patterned and etched conductive metal layer is formed above the polymer layer and is aligned therewith. And at least one layer of solder material having a solder height is provided above the conductive metal layer, the layer of solder is aligned with the conductive metal layer, the layer of solder is thereafter reflown thereby creating a solder ball.

摘要翻译： 提供了用于半导体器件封装的焊接凸块结构。 在一个实施例中，焊料凸块结构包括半导体衬底，所述衬底具有至少一个接触焊盘和具有形成在其中的至少一个开口的上钝化层，其暴露接触焊盘的一部分。 在接触垫的一部分上形成至少一个图案化和蚀刻的聚合物层。 在聚合物层之上形成至少一个图案化和蚀刻的导电金属层并与其对准。 并且在导电金属层的上方设置至少一层具有焊料高度的焊料材料，该焊料层与导电金属层对准，此后焊料层被回流，从而形成焊球。

公开(公告)号：US20060043602A1

公开(公告)日：2006-03-02

申请号：US10932005

申请日：2004-09-02

申请人： Kuo-Chin Chang ,  Simon Lu

发明人： Kuo-Chin Chang ,  Simon Lu

IPC分类号： H01L23/48

CPC分类号： H01L23/49838 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/562 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/15311 ,  H01L2224/0401

摘要： A flip chip ball grid array package is provided. In one embodiment, a flip chip ball grid array package comprises a substrate having an upper surface and a lower surface opposite the upper surface and a microelectronic element comprising a set of solder balls being secured to the upper surface of the substrate. A constraint member is secured to the lower surface of the substrate so that the constraint member has a degree of rigidity to reduce warpage due to thermal expansion mismatches between at least the microelectronic element and the substrate.

摘要翻译： 提供倒装芯片球栅阵列封装。 在一个实施例中，倒装芯片球栅阵列封装包括具有上表面和与上表面相对的下表面的衬底，以及包括一组焊球固定到衬底的上表面的微电子元件。 约束构件被固定到基板的下表面，使得约束构件具有刚度以减少由于至少微电子元件和基板之间的热膨胀错配引起的翘曲。

公开(公告)号：US20060180944A1

公开(公告)日：2006-08-17

申请号：US11400316

申请日：2006-04-10

申请人： Kuo-Chin Chang ,  Simon Lu

发明人： Kuo-Chin Chang ,  Simon Lu

IPC分类号： H01L23/48

CPC分类号： H01L23/49838 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/562 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/15311 ,  H01L2224/0401

摘要： A flip chip ball grid array package is provided. In one embodiment, a flip chip ball grid array package comprises a substrate having an upper surface and a lower surface opposite the upper surface and a microelectronic element comprising a set of solder balls being secured to the upper surface of the substrate. A constraint member is secured to the lower surface of the substrate so that the constraint member has a degree of rigidity to reduce warpage due to thermal expansion mismatches between at least the microelectronic element and the substrate.

公开(公告)号：US06282205B1

公开(公告)日：2001-08-28

申请号：US08922082

申请日：1997-09-02

申请人： Simon Lu

发明人： Simon Lu

IPC分类号： H04L1228

CPC分类号： H04L12/2838 ,  H04B1/205 ,  H04L12/2803 ,  H04L12/2821 ,  H04L12/2823 ,  H04L12/66 ,  H04L2012/2849 ,  H04N21/43615

摘要： A digital central control unit is connected in a master/slave relationship to a plurality of audio, video, and data components, at least one of which may be an analog component. A decoder digital-to-analog unit is positioned at the input of all analog components so that signals transmitted to them from the central control unit are not decoded and converted to analog signals until after the transmission has been completed. An encoder analog-to-digital unit for converting analog signals to digital signals is positioned at the output of each analog component so that their respective analog signals are in encoded digital format when being transmitted to the central control unit. The network is thus all-digital and is therefore not subject to the limitations of networks having analog transmission lines.

摘要翻译： 数字中央控制单元以主/从关系连接到多个音频，视频和数据组件，其中至少一个可以是模拟组件。 解码器数/模单元位于所有模拟部件的输入端，使得从中央控制单元发送给它们的信号不被解码并转换成模拟信号，直到传输完成。 用于将模拟信号转换为数字信号的编码器模拟数字单元位于每个模拟分量的输出处，使得它们各自的模拟信号在被传送到中央控制单元时处于编码数字格式。 因此，网络是全数字的，因此不受具有模拟传输线的网络的限制。