公开(公告)号：US11616139B2

公开(公告)日：2023-03-28

申请号：US17224108

申请日：2021-04-06

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Yen Feng ,  Chen-An Kuo ,  Ching-Wei Teng ,  Po-Chun Lai

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/66 ,  H01L21/285 ,  H01L21/74 ,  H01L29/45

Abstract: An LDMOS includes a semiconductor substrate. A well is disposed within the semiconductor substrate. A body region is disposed within the well. A first gate electrode is disposed on the semiconductor substrate. A source electrode is disposed at one side of the first gate electrode. The source electrode includes a source contact area and numerous vias. The vias connect to the source contact area. The vias extend into the semiconductor substrate. A first drain electrode is disposed at another side of the first gate electrode and is opposed to the source electrode.

公开(公告)号：US20220271157A1

公开(公告)日：2022-08-25

申请号：US17224108

申请日：2021-04-06

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Yen Feng ,  Chen-An Kuo ,  Ching-Wei Teng ,  Po-Chun Lai

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/45 ,  H01L21/285 ,  H01L21/74 ,  H01L29/66

Abstract: An LDMOS includes a semiconductor substrate. A well is disposed within the semiconductor substrate. A body region is disposed within the well. A first gate electrode is disposed on the semiconductor substrate. A source electrode is disposed at one side of the first gate electrode. The source electrode includes a source contact area and numerous vias. The vias connect to the source contact area. The vias extend into the semiconductor substrate. A first drain electrode is disposed at another side of the first gate electrode and is opposed to the source electrode.

公开(公告)号：US20200350317A1

公开(公告)日：2020-11-05

申请号：US16931397

申请日：2020-07-16

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Pin-Hong Chen ,  Tsun-Min Cheng ,  Chih-Chieh Tsai ,  Tzu-Chieh Chen ,  Kai-Jiun Chang ,  Chia-Chen Wu ,  Yi-An Huang ,  Yi-Wei Chen ,  Hsin-Fu Huang ,  Chi-Mao Hsu ,  Li-Wei Feng ,  Ying-Chiao Wang ,  Chung-Yen Feng

IPC: H01L27/108 ,  H01L23/532 ,  H01L23/522 ,  H01L21/285 ,  H01L23/528 ,  H01L21/768 ,  H01L49/02

Abstract: The present invention provides a storage node contact structure of a memory device comprising a substrate having a dielectric layer comprising a recess, a first tungsten metal layer, and an adhesive layer on the first tungsten metal layer and a second tungsten metal layer on the adhesive layer, wherein the second tungsten metal layer is formed by a physical vapor deposition (PVD).

公开(公告)号：US10756090B2

公开(公告)日：2020-08-25

申请号：US15922899

申请日：2018-03-15

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Pin-Hong Chen ,  Tsun-Min Cheng ,  Chih-Chieh Tsai ,  Tzu-Chieh Chen ,  Kai-Jiun Chang ,  Chia-Chen Wu ,  Yi-An Huang ,  Yi-Wei Chen ,  Hsin-Fu Huang ,  Chi-Mao Hsu ,  Li-Wei Feng ,  Ying-Chiao Wang ,  Chung-Yen Feng

IPC: H01L21/8242 ,  H01L27/108 ,  H01L23/532 ,  H01L23/522 ,  H01L21/285 ,  H01L23/528 ,  H01L21/768 ,  H01L49/02 ,  H01L21/02

Abstract: The present invention provides a storage node contact structure of a memory device comprising a substrate having a dielectric layer comprising a recess, a first tungsten metal layer, and an adhesive layer on the first tungsten metal layer and a second tungsten metal layer on the adhesive layer, wherein the second tungsten metal layer is formed by a physical vapor deposition (PVD).

公开(公告)号：US11877433B2

公开(公告)日：2024-01-16

申请号：US16931397

申请日：2020-07-16

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Pin-Hong Chen ,  Tsun-Min Cheng ,  Chih-Chieh Tsai ,  Tzu-Chieh Chen ,  Kai-Jiun Chang ,  Chia-Chen Wu ,  Yi-An Huang ,  Yi-Wei Chen ,  Hsin-Fu Huang ,  Chi-Mao Hsu ,  Li-Wei Feng ,  Ying-Chiao Wang ,  Chung-Yen Feng

IPC: H01L23/48 ,  H10B12/00 ,  H01L23/532 ,  H01L23/522 ,  H01L21/285 ,  H01L23/528 ,  H01L21/768 ,  H01L49/02 ,  H01L21/02

CPC classification number: H10B12/0335 ,  H01L21/28568 ,  H01L21/7684 ,  H01L21/7685 ,  H01L21/76831 ,  H01L21/76876 ,  H01L21/76877 ,  H01L23/528 ,  H01L23/5226 ,  H01L23/53266 ,  H01L28/91 ,  H10B12/31 ,  H10B12/315 ,  H01L21/0217 ,  H01L21/0228

Abstract: The present invention provides a storage node contact structure of a memory device comprising a substrate having a dielectric layer comprising a recess, a first tungsten metal layer, and an adhesive layer on the first tungsten metal layer and a second tungsten metal layer on the adhesive layer, wherein the second tungsten metal layer is formed by a physical vapor deposition (PVD).

公开(公告)号：US20180301458A1

公开(公告)日：2018-10-18

申请号：US15922899

申请日：2018-03-15

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Pin-Hong Chen ,  Tsun-Min Cheng ,  Chih-Chieh Tsai ,  Tzu-Chieh Chen ,  Kai-Jiun Chang ,  Chia-Chen Wu ,  Yi-An Huang ,  Yi-Wei Chen ,  Hsin-Fu Huang ,  Chi-Mao Hsu ,  Li-Wei Feng ,  Ying-Chiao Wang ,  Chung-Yen Feng

IPC: H01L27/108 ,  H01L23/532 ,  H01L23/522 ,  H01L21/285 ,  H01L23/528 ,  H01L21/768

Abstract: The present invention provides a storage node contact structure of a memory device comprising a substrate having a dielectric layer comprising a recess, a first tungsten metal layer, and an adhesive layer on the first tungsten metal layer and a second tungsten metal layer on the adhesive layer, wherein the second tungsten metal layer is formed by a physical vapor deposition (PVD).

公开(公告)号：US11670713B2

公开(公告)日：2023-06-06

申请号：US17884599

申请日：2022-08-10

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Yen Feng ,  Chen-An Kuo ,  Ching-Wei Teng ,  Po-Chun Lai

IPC: H01L21/28 ,  H01L29/78 ,  H01L29/10 ,  H01L29/66 ,  H01L21/285 ,  H01L21/74 ,  H01L29/45

CPC classification number: H01L29/7816 ,  H01L21/28518 ,  H01L21/743 ,  H01L29/1087 ,  H01L29/1095 ,  H01L29/45 ,  H01L29/66681

Abstract: An LDMOS includes a semiconductor substrate. A well is disposed within the semiconductor substrate. A body region is disposed within the well. A first gate electrode is disposed on the semiconductor substrate. A source electrode is disposed at one side of the first gate electrode. The source electrode includes a source contact area and numerous vias. The vias connect to the source contact area. The vias extend into the semiconductor substrate. A first drain electrode is disposed at another side of the first gate electrode and is opposed to the source electrode.

公开(公告)号：US20220384638A1

公开(公告)日：2022-12-01

申请号：US17884599

申请日：2022-08-10

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Yen Feng ,  Chen-An Kuo ,  Ching-Wei Teng ,  Po-Chun Lai

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/10 ,  H01L29/45 ,  H01L21/285 ,  H01L21/74

Abstract: An LDMOS includes a semiconductor substrate. A well is disposed within the semiconductor substrate. A body region is disposed within the well. A first gate electrode is disposed on the semiconductor substrate. A source electrode is disposed at one side of the first gate electrode. The source electrode includes a source contact area and numerous vias. The vias connect to the source contact area. The vias extend into the semiconductor substrate. A first drain electrode is disposed at another side of the first gate electrode and is opposed to the source electrode.