公开(公告)号：US10777420B1

公开(公告)日：2020-09-15

申请号：US16286495

申请日：2019-02-26

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuan-Ying Lai ,  Chang-Mao Wang ,  Hsin-Yu Hsieh

IPC: H01L21/311 ,  H01L21/768 ,  H01L21/02 ,  H01L21/306 ,  H01L21/31 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/04 ,  H01L21/308

Abstract: A material layer having recesses is formed on a substrate including a high pattern density area and a low pattern density area. A first dielectric layer and a second dielectric layer are sequentially formed to cover the material layer, wherein a top surface of the first dielectric layer in the high pattern density area is higher than a top surface of the first dielectric layer in the low pattern density area, thereby a thickness of the second dielectric layer in the low pattern density area being thicker than a thickness of the second dielectric layer in the high pattern density area. An etching back process is performed to remove the second dielectric layer and the first dielectric layer, wherein the etching rate of the etching back process to the second dielectric layer is lower than the etching rate of the etching back process to the first dielectric layer.

公开(公告)号：US11488829B1

公开(公告)日：2022-11-01

申请号：US17337457

申请日：2021-06-03

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuan-Ying Lai ,  Hsin-Yu Hsieh ,  Chang-Mao Wang ,  Chung-Yi Chiu

IPC: H01L21/28 ,  H01L21/3213 ,  H01L29/49

Abstract: A method of forming a semiconductor device is disclosed. A substrate having a first device region and a second device region is provided. A metal nitride barrier layer is formed to cover the first device region and the second device region. A titanium layer is deposited on the metal nitride barrier layer. The titanium layer is selectively removed from the second device region, thereby exposing the metal nitride barrier layer in the second device region. The titanium layer in the first device region is transformed into a titanium nitride layer. The titanium nitride layer is a work function layer on the first device region.

公开(公告)号：US09443741B1

公开(公告)日：2016-09-13

申请号：US14748257

申请日：2015-06-24

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Wen Su ,  Zhi-Jian Wang ,  Cheng-Chang Wu ,  Hsin-Yu Hsieh ,  Shui-Yen Lu

IPC: H01L21/302 ,  H01L21/461 ,  H01L21/308

CPC classification number: H01L21/0271 ,  H01L21/31055 ,  H01L21/31058

Abstract: An etching method includes forming a high density structure and a low density structure on a substrate. A first material layer is formed to cover both structures. Part of the low density structure is exposed through the first material layer. A second material layer is formed to cover the first material layer. The second material layer is etched to remove the second material layer on the high density structure and part of the second material layer on the low density structure. The first material layer on the high density structure and the second material layer on the low density structure are simultaneously etched. The first material layer is etched to expose a first portion of the high density structure and a second portion of the low density structure. Finally, the first portion and the second portion are removed.

Abstract translation: 蚀刻方法包括在基板上形成高密度结构和低密度结构。 形成第一材料层以覆盖两个结构。 低密度结构的一部分通过第一材料层暴露。 形成第二材料层以覆盖第一材料层。 蚀刻第二材料层以去除高密度结构上的第二材料层和低密度结构上的第二材料层的一部分。 同时蚀刻高密度结构上的第一材料层和低密度结构上的第二材料层。 蚀刻第一材料层以暴露高密度结构的第一部分和低密度结构的第二部分。 最后，去除第一部分和第二部分。

公开(公告)号：US20220367192A1

公开(公告)日：2022-11-17

申请号：US17337457

申请日：2021-06-03

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuan-Ying Lai ,  Hsin-Yu Hsieh ,  Chang-Mao Wang ,  Chung-Yi Chiu

IPC: H01L21/28 ,  H01L29/49 ,  H01L21/3213

Abstract: A method of forming a semiconductor device is disclosed. A substrate having a first device region and a second device region is provided. A metal nitride barrier layer is formed to cover the first device region and the second device region. A titanium layer is deposited on the metal nitride barrier layer. The titanium layer is selectively removed from the second device region, thereby exposing the metal nitride barrier layer in the second device region. The titanium layer in the first device region is transformed into a titanium nitride layer. The titanium nitride layer is a work function layer on the first device region.

公开(公告)号：US12147163B2

公开(公告)日：2024-11-19

申请号：US17528295

申请日：2021-11-17

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Hsin-Yu Hsieh ,  Kuan-Ying LAi ,  Chang-Mao Wang ,  Chien-Hao Chen ,  Chun-Chi Yu

IPC: G03F7/00

Abstract: A method for correcting critical dimension (CD) measurements of a lithographic tool includes steps as follows. A correction pattern having a first sub-pattern parallel to a first direction and a second sub-pattern parallel to a second direction is provided on a lithographic mask; wherein the first sub-pattern and the second sub-pattern come cross with each other. A first After-Develop-Inspection critical dimension (ADI CD) of a developed pattern formed on a photo-sensitive layer and transferred from the correction pattern is measured using the lithographic tool along a first scanning direction. A second ADI CD of the developed pattern is measured using the lithographic tool along a second scanning direction. The first ADI CD is subtracted from the second ADI CD to obtain a measurement bias value. Exposure conditions and/or measuring parameters of the lithographic tool are adjusted according to the measurement bias value.

公开(公告)号：US20200273714A1

公开(公告)日：2020-08-27

申请号：US16286495

申请日：2019-02-26

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuan-Ying Lai ,  Chang-Mao Wang ,  Hsin-Yu Hsieh

IPC: H01L21/311 ,  H01L21/768

Abstract: A material layer having recesses is formed on a substrate including a high pattern density area and a low pattern density area. A first dielectric layer and a second dielectric layer are sequentially formed to cover the material layer, wherein a top surface of the first dielectric layer in the high pattern density area is higher than a top surface of the first dielectric layer in the low pattern density area, thereby a thickness of the second dielectric layer in the low pattern density area being thicker than a thickness of the second dielectric layer in the high pattern density area. An etching back process is performed to remove the second dielectric layer and the first dielectric layer, wherein the etching rate of the etching back process to the second dielectric layer is lower than the etching rate of the etching back process to the first dielectric layer.