-
公开(公告)号:US10854520B2
公开(公告)日:2020-12-01
申请号:US16416279
申请日:2019-05-20
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chia-Lin Lu , Chun-Lung Chen , Kun-Yuan Liao , Chun-Hsien Lin , Wei-Hao Huang , Kai-Teng Cheng
IPC: H01L21/8234 , H01L21/321 , H01L21/28 , H01L21/30 , H01L27/092 , H01L21/8238
Abstract: The present invention provides a method for forming a semiconductor structure. The method including: Firstly, a substrate is provided, a first region and a second region are defined thereon, next, a gate dielectric layer and a work function metal layer are sequentially formed on the substrate within the first region and within the second region. Afterwards, a dielectric layer is formed on the work function metal layer within the second region, a hydrogen gas treatment is then performed on the substrate, and the work function metal layer is removed within the first region.
-
公开(公告)号:US10109525B1
公开(公告)日:2018-10-23
申请号:US15820123
申请日:2017-11-21
Applicant: United Microelectronics Corp.
Inventor: Chia-Lin Lu , Chun-Lung Chen , Kun-Yuan Liao , Jiunn-Hsiung Liao , Wei-Hao Huang , Kai-Teng Cheng
IPC: H01L21/768 , H01L23/528 , H01L21/311 , H01L29/78
Abstract: A method for fabricating a semiconductor device is provided including providing a substrate, on which a plurality of elements is formed. A first inter-dielectric layer is formed over the substrate, covering the elements. A first plug structure is formed in the first inter-dielectric layer, including performing a polishing process over the first inter-dielectric layer to have a dishing on top and extending from a sidewall of the first plug structure. A hard mask layer is formed to fill the dishing. A second inter-dielectric layer is formed over the hard mask layer. A second plug structure is formed in the second inter-dielectric layer to electrically contact the first plug structure, wherein the second plug structure has at least an edge portion extending on the hard mask layer.
-
公开(公告)号:US20190279909A1
公开(公告)日:2019-09-12
申请号:US16416279
申请日:2019-05-20
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chia-Lin Lu , Chun-Lung Chen , Kun-Yuan Liao , Chun-Hsien Lin , Wei-Hao Huang , Kai-Teng Cheng
IPC: H01L21/8234 , H01L21/30 , H01L21/321 , H01L21/28
Abstract: The present invention provides a method for forming a semiconductor structure. The method including: Firstly, a substrate is provided, a first region and a second region are defined thereon, next, a gate dielectric layer and a work function metal layer are sequentially formed on the substrate within the first region and within the second region. Afterwards, a dielectric layer is formed on the work function metal layer within the second region, a hydrogen gas treatment is then performed on the substrate, and the work function metal layer is removed within the first region.
-
公开(公告)号:US20190252259A1
公开(公告)日:2019-08-15
申请号:US15893672
申请日:2018-02-11
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chia-Lin Lu , Chun-Lung Chen , Kun-Yuan Liao , Chun-Hsien Lin , Wei-Hao Huang , Kai-Teng Cheng
IPC: H01L21/8234 , H01L21/30 , H01L21/28 , H01L21/321
CPC classification number: H01L21/82345 , H01L21/28088 , H01L21/3003 , H01L21/3212 , H01L21/823462
Abstract: The present invention provides a method for forming a semiconductor structure. The method including: Firstly, a substrate is provided, a first region and a second region are defined thereon, next, a gate dielectric layer and a work function metal layer are sequentially formed on the substrate within the first region and within the second region. Afterwards, a dielectric layer is formed on the work function metal layer within the second region, a hydrogen gas treatment is then performed on the substrate, and the work function metal layer is removed within the first region.
-
-
-