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公开(公告)号：US10061610B2
公开(公告)日：2018-08-28
申请号：US15592957
申请日：2017-05-11
Applicant: VMware, Inc.
Inventor： Haoqiang Zheng , Lenin Singaravelu , Shilpi Agarwal , Daniel Michael Hecht , Garrett Smith
CPC classification number: G06F9/45558 , G06F9/45533 , G06F9/4812 , G06F9/4887 , G06F9/50 , G06F9/5027 , G06F9/5033 , G06F9/5088 , G06F13/24 , G06F2009/4557 , G06F2009/45575 , G06F2009/45591 , G06F2209/5017 , H04L43/0894 , H04L43/16 , H04L47/56 , H04L47/801
Abstract: A host computer has one or more physical central processing units (CPUs) that support the execution of a plurality of containers, where the containers each include one or more processes. Each process of a container is assigned to execute exclusively on a corresponding physical CPU when the corresponding container is determined to be latency sensitive. The assignment of a process to execute exclusively on a corresponding physical CPU includes the migration of tasks from the corresponding physical CPU to one or more other physical CPUs of the host system, and the directing of task and interrupt processing to the one or more other physical CPUs. Tasks of of the process corresponding to the container are then executed on the corresponding physical CPU.
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公开(公告)号：US09652280B2
公开(公告)日：2017-05-16
申请号：US15044035
申请日：2016-02-15
Applicant: VMware, Inc.
Inventor： Haoqiang Zheng , Lenin Singaravelu , Shilpi Agarwal , Daniel Michael Hecht , Garrett Smith
IPC: G06F9/46 , G06F9/455 , H04L12/875 , H04L12/26 , H04L12/927 , G06F13/24 , G06F9/50
CPC classification number: G06F9/4812 , G06F9/45533 , G06F9/45558 , G06F9/4887 , G06F9/50 , G06F9/5027 , G06F9/5033 , G06F9/5088 , G06F13/24 , G06F2009/4557 , G06F2009/45575 , G06F2009/45591 , G06F2209/5017 , H04L43/0894 , H04L43/16 , H04L47/56 , H04L47/801
Abstract: A host computer has one or more physical central processing units (CPUs) that support the execution of a plurality of containers, where the containers each include one or more processes. Each process of a container is assigned to execute exclusively on a corresponding physical CPU when the corresponding container is determined to be latency sensitive. The assignment of a process to execute exclusively on a corresponding physical CPU includes the migration of tasks from the corresponding physical CPU to one or more other physical CPUs of the host system, and the directing of task and interrupt processing to the one or more other physical CPUs. Tasks of the process corresponding to the container are then executed on the corresponding physical CPU.
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3.发明授权公开(公告)号：US09262198B2
公开(公告)日：2016-02-16
申请号：US14468121
申请日：2014-08-25
Applicant: VMware, Inc.
Inventor： Haoqiang Zheng , Lenin Singaravelu , Shilpi Agarwal , Daniel Michael Hecht , Garrett Smith
IPC: G06F9/46 , G06F9/455 , H04L12/875 , H04L12/26 , H04L12/927 , G06F13/24 , G06F9/50
CPC classification number: G06F9/4812 , G06F9/45533 , G06F9/45558 , G06F9/4887 , G06F9/50 , G06F9/5027 , G06F9/5033 , G06F9/5088 , G06F13/24 , G06F2009/4557 , G06F2009/45575 , G06F2009/45591 , G06F2209/5017 , H04L43/0894 , H04L43/16 , H04L47/56 , H04L47/801
Abstract: A host computer has one or more physical central processing units (CPUs) that support the execution of a plurality of containers, where the containers each include one or more processes. Each process of a container is assigned to execute exclusively on a corresponding physical CPU when the corresponding container is determined to be latency sensitive. The assignment of a process to execute exclusively on a corresponding physical CPU includes the migration of tasks from the corresponding physical CPU to one or more other physical CPUs of the host system, and the directing of task and interrupt processing to the one or more other physical CPUs. Tasks of the process corresponding to the container are then executed on the corresponding physical CPU.
Abstract translation: 主计算机具有支持执行多个容器的一个或多个物理中央处理单元（CPU），其中容器各自包括一个或多个处理。 当相应的容器被确定为延迟敏感时，容器的每个进程被分配为在相应的物理CPU上专门执行。 专门在对应的物理CPU上执行的进程的分配包括将任务从对应的物理CPU迁移到主机系统的一个或多个其他物理CPU，以及将任务和中断处理定向到一个或多个其他物理 CPU。 然后在对应的物理CPU上执行与容器对应的进程的任务。
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公开(公告)号：US10452417B2
公开(公告)日：2019-10-22
申请号：US14721461
申请日：2015-05-26
Applicant: VMware, Inc.
Inventor： Benjamin Charles Serebrin , Daniel Michael Hecht
Abstract: Methods, apparatus, and articles of manufacture to virtualize performance counters are disclosed. An example method includes dividing performance events to be counted into a plurality of classes; assigning a first virtual performance counter of a virtual machine to a first performance event type in a first one of the classes; assigning a second virtual performance counter of the virtual machine to a second performance event type in a second one of the classes different from the first class; incrementing the first virtual performance counter in response to a first occurrence of the first performance event type during direct execution of guest instructions by the virtual machine; and not incrementing the first virtual performance counter in response to a second occurrence of the first performance event type during execution of emulated instructions by a hypervisor on behalf of the virtual machine.
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公开(公告)号：US10073711B2
公开(公告)日：2018-09-11
申请号：US15097035
申请日：2016-04-12
Applicant: VMware, Inc.
Inventor： Haoqiang Zheng , Lenin Singaravelu , Shilpi Agarwal , Daniel Michael Hecht , Garrett Smith
IPC: G06F9/455 , H04L12/875 , H04L12/26 , H04L12/927 , G06F9/50 , G06F13/24 , G06F9/48
CPC classification number: G06F9/45558 , G06F9/45533 , G06F9/4812 , G06F9/4887 , G06F9/50 , G06F9/5027 , G06F9/5033 , G06F9/5088 , G06F13/24 , G06F2009/4557 , G06F2009/45575 , G06F2009/45591 , G06F2209/5017 , H04L43/0894 , H04L43/16 , H04L47/56 , H04L47/801
Abstract: A host computer has a virtualization software that supports execution of a plurality of virtual machines, where the virtualization software includes a virtual machine monitor for each of the virtual machines, and where each virtual machine monitor emulates a virtual central processing unit (CPU) for a corresponding virtual machine. A virtual machine monitor halts execution of a virtual CPU of a virtual machine by receiving a first halt instruction from a corresponding virtual machine and determining whether the virtual machine is latency sensitive. If the virtual machine is latency sensitive, then a second halt instruction is issued from the virtual machine monitor to halt a physical CPU on which the virtual CPU executes. If the virtual machine is not latency sensitive, then a system call to a kernel executing on the host computer is executed to indicate to the kernel that the virtual CPU is in an idle state.
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Patent Agency Ranking
6.发明授权公开(公告)号：US09703589B2
公开(公告)日：2017-07-11
申请号：US14468181
申请日：2014-08-25
Applicant: VMware, Inc.
Inventor： Haoqiang Zheng , Lenin Singaravelu , Shilpi Agarwal , Daniel Michael Hecht , Garrett Smith
IPC: G06F9/455 , H04L12/875 , H04L12/26 , H04L12/927 , G06F13/24 , G06F9/50
CPC classification number: G06F9/4812 , G06F9/45533 , G06F9/45558 , G06F9/4887 , G06F9/50 , G06F9/5027 , G06F9/5033 , G06F9/5088 , G06F13/24 , G06F2009/4557 , G06F2009/45575 , G06F2009/45591 , G06F2209/5017 , H04L43/0894 , H04L43/16 , H04L47/56 , H04L47/801
Abstract: A host computer has a plurality of containers including a first container executing therein, where the host also includes a physical network interface controller (NIC). A packet handling interrupt is detected upon receipt of a first data packet associated with the first container If the first virtual machine is latency sensitive, then the packet handling interrupt is processed. If the first virtual machine is not latency sensitive, then the first data packet is queued and processing of the packet handling interrupt is delayed.
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7.发明授权公开(公告)号：US10860356B2
公开(公告)日：2020-12-08
申请号：US15645469
申请日：2017-07-10
Applicant: VMware, Inc.
Inventor： Haoqiang Zheng , Lenin Singaravelu , Shilpi Agarwal , Daniel Michael Hecht , Garrett Smith
IPC: G06F9/455 , G06F9/50 , G06F13/24 , G06F9/48 , H04L12/875 , H04L12/26 , H04L12/927
Abstract: A host computer has a plurality of containers including a first container executing therein, where the host also includes a physical network interface controller (NIC). A packet handling interrupt is detected upon receipt of a first data packet associated with the first container. If the first virtual machine is latency sensitive, then the packet handling interrupt is processed. If the first virtual machine is not latency sensitive, then the first data packet is queued and and processing of the packet handling interrupt is delayed.
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8.发明授权Pass-through network interface controller configured to support latency sensitive virtual machines 有权通过网络接口控制器配置为支持延迟敏感的虚拟机公开(公告)号：US09552216B2
公开(公告)日：2017-01-24
申请号：US14468138
申请日：2014-08-25
Applicant: VMware, Inc.
Inventor： Haoqiang Zheng , Lenin Singaravelu , Shilpi Agarwal , Daniel Michael Hecht , Garrett Smith
IPC: G06F9/455 , H04L12/875 , H04L12/26 , H04L12/927 , G06F13/24 , G06F9/50
CPC classification number: G06F9/4812 , G06F9/45533 , G06F9/45558 , G06F9/4887 , G06F9/50 , G06F9/5027 , G06F9/5033 , G06F9/5088 , G06F13/24 , G06F2009/4557 , G06F2009/45575 , G06F2009/45591 , G06F2209/5017 , H04L43/0894 , H04L43/16 , H04L47/56 , H04L47/801
Abstract: A host computer has a plurality of virtual machines executing therein under the control of a hypervisor, where the host also includes a physical network interface controller (NIC). An interrupt controller detects an interrupt generated by the physical NIC, where the interrupt corresponds to a virtual machine. If the virtual machine has exclusive affinity to one or more physical central processing units (CPUs), then the interrupt is forwarded to the virtual machine. If the virtual machine does not have exclusive affinity, then a process in the hypervisor is invoked to forward the interrupt to the virtual machine.
Abstract translation: 主机在管理程序的控制下具有执行其中的多个虚拟机，其中主机还包括物理网络接口控制器（NIC）。 中断控制器检测由物理NIC产生的中断，其中中断对应于虚拟机。 如果虚拟机对一个或多个物理中央处理单元（CPU）具有独占性，则将中断转发到虚拟机。 如果虚拟机没有独占关系，则调用管理程序中的进程以将中断转发到虚拟机。
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9.发明申请公开(公告)号：US20150378762A1
公开(公告)日：2015-12-31
申请号：US14319231
申请日：2014-06-30
Applicant: VMware, Inc.
Inventor： Kalyan Saladi , Reza Taheri , Daniel Michael Hecht , Jin Heo , Jeffrey Buell
CPC classification number: G06F9/45558 , G06F2009/4557 , G06F2009/45583 , G06F2009/45591 , H04L41/0816 , H04L43/0817 , H04L43/16
Abstract: The current document is directed to methods and systems for monitoring the performance of memory management in virtual machines. By accurately measuring the performance of memory management in virtual machines, a virtualization layer can dynamically reconfigure virtual machines to use more optimal memory-management methods, intelligently schedule execution of virtual machines to increase memory-management performance, and migrate virtual machines among different servers and computer systems to increase memory-management performance.
Abstract translation: 当前文档针对的是监视虚拟机内存管理性能的方法和系统。 通过准确测量虚拟机中的内存管理性能，虚拟化层可以动态重新配置虚拟机，以使用更优化的内存管理方法，智能地调度虚拟机的执行以提高内存管理性能，并在不同的服务器之间迁移虚拟机， 计算机系统增加内存管理性能。
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10.发明申请VIRTUAL PERFORMANCE MONITORING DECOUPLED FROM HARDWARE PERFORMANCE-MONITORING UNITS 有权五金性能监测单位进行的虚拟性能监测公开(公告)号：US20150312116A1
公开(公告)日：2015-10-29
申请号：US14263640
申请日：2014-04-28
Applicant: VMware, Inc.
Inventor： Reza Taheri , Kalyan Saladi , Daniel Michael Hecht , Jin Heo , Jeffrey Buell
CPC classification number: H04L67/10 , H04L43/00 , H04L67/1097
Abstract: The current document is directed to virtualized PMUs provided by virtualization layers. The currently disclosed virtualized PMUs are decoupled from the underlying PMU hardware features of processors on which the virtualization layer executes. The decoupling is achieved, in part, by time multiplexing the underlying hardware PMU registers to provide a greater number of virtualized PMU registers than the number of hardware-PMU registers provided by at least some of the underlying hardware PMUs. The decoupling is also achieved by providing for monitoring, by the virtualized PMU registers, of computed processor events and approximated processor events in addition to the processor events monitored by the underlying hardware PMUs. In addition, the virtualized PMU registers are implemented, in certain implementations, to support a variety of different monitoring modes, including monitoring of processor events that occur only during execution of the virtualization layer and monitoring of hardware-thread-specific processor events.
Abstract translation: 当前文档针对虚拟化层提供的虚拟化PMU。 目前公开的虚拟化PMU与虚拟化层执行的处理器的底层PMU硬件特征分离。 解耦是部分地通过时间复用底层硬件PMU寄存器来实现的，以提供比由至少一些底层硬件PMU提供的硬件PMU寄存器的数量更多的虚拟化PMU寄存器。 还可以通过虚拟化PMU寄存器监视计算的处理器事件和近似处理器事件以及底层硬件PMU监控的处理器事件之外的其他方式实现去耦。 此外，在某些实现中，虚拟化PMU寄存器被实现以支持各种不同的监视模式，包括监视仅在执行虚拟化层期间发生的处理器事件以及监视硬件线程特定处理器事件。
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