Secure booting of computer system

    公开(公告)号:US10242196B2

    公开(公告)日:2019-03-26

    申请号:US15223998

    申请日:2016-07-29

    Applicant: VMware, Inc.

    Abstract: A computer system is securely booted by executing a boot firmware to locate a boot loader and verify the boot loader using a first key that is associated with the boot firmware. Upon verifying the boot loader, computer system executes the boot loader to verify a system software kernel and a secure boot verifier using a second key that is associated with the boot loader. The secure boot verifier is then executed to verify the remaining executable software modules to be loaded during boot using a third key that is associated with the secure boot verifier and a fourth key that is associated with a user of the computer system.

    Managing the migration of virtual machines in the presence of uncorrectable memory errors

    公开(公告)号:US11169870B2

    公开(公告)日:2021-11-09

    申请号:US16743895

    申请日:2020-01-15

    Applicant: VMware, Inc.

    Abstract: Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.

    Managing Virtual Machines in the Presence of Uncorrectable Memory Errors

    公开(公告)号:US20210216394A1

    公开(公告)日:2021-07-15

    申请号:US16743895

    申请日:2020-01-15

    Applicant: VMware, Inc.

    Abstract: Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.

    Power-Aware Scheduling
    7.
    发明申请
    Power-Aware Scheduling 有权
    电源意识调度

    公开(公告)号:US20150212860A1

    公开(公告)日:2015-07-30

    申请号:US14167213

    申请日:2014-01-29

    Applicant: VMware, Inc.

    CPC classification number: G06F9/5094 G06F9/5083 G06F9/5088 Y02D10/22 Y02D10/32

    Abstract: Systems and techniques are described for power-aware scheduling. One of the techniques includes monitoring execution of a plurality of groups of software threads executing on a physical machine, wherein the physical machine comprises a physical hardware platform that includes a plurality of processor packages having a plurality of package power states, wherein the plurality of package power states includes an independent package power state; obtaining a respective independent power state measure for each of the processor packages, wherein the independent power state measure provides a measure of a percentage of time the processor package spends in the independent package power state; and adjusting an allocation of the plurality of groups of software threads across the plurality of processor packages based in part on the independent power state measures for the packages.

    Abstract translation: 描述了用于功率感知调度的系统和技术。 技术之一包括监视在物理机器上执行的多组软件线程的执行,其中所述物理机器包括物理硬件平台,所述物理硬件平台包括具有多个封装电源状态的多个处理器封装,其中所述多个封装 电源状态包括独立的封装电源状态; 为每个处理器包获得相应的独立功率状态测量,其中所述独立功率状态测量提供所述处理器封装在所述独立封装功率状态下花费的时间百分比的量度; 以及部分地基于用于所述包的独立功率状态测量来调整跨所述多个处理器包的所述多组软件线程的分配。

    Secure booting of computer system
    10.
    发明授权

    公开(公告)号:US10592669B2

    公开(公告)日:2020-03-17

    申请号:US15191413

    申请日:2016-06-23

    Applicant: VMware, Inc.

    Abstract: A computer system is securely booted by executing a boot firmware to locate a boot loader and verify the boot loader using a first key that is associated with the boot firmware. Upon verifying the boot loader, computer system executes the boot loader to verify a system software kernel and a secure boot verifier using a second key that is associated with the boot loader. The secure boot verifier is then executed to verify the remaining executable software modules to be loaded during boot using a third key that is associated with the secure boot verifier. During boot, state data files of the computer system are mounted in a namespace that is isolated from the namespaces in which the executable software modules are mounted.

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