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公开(公告)号:US20170178740A1
公开(公告)日:2017-06-22
申请号:US15381724
申请日:2016-12-16
申请人: Youngmin Kim , Il Han Park , Sung-Won Yun , Hyejin Yim
发明人: Youngmin Kim , Il Han Park , Sung-Won Yun , Hyejin Yim
CPC分类号: G11C16/3459 , G11C11/5671 , G11C16/08 , G11C16/10 , G11C16/3481 , G11C2211/562 , G11C2211/5621 , G11C2211/5644
摘要: A nonvolatile memory device is provided as follows. A memory cell array includes a plurality of memory cells. An address decoder provides a first verify voltage to selected memory cells among the plurality of memory cells in a first program loop and provides a second verify voltage to the selected memory cells in a second program loop. A control logic determines the second program loop as a verify voltage offset point in which the first verify voltage is changed to the second verify voltage based on a result of a verify operation of the first program loop.
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公开(公告)号:US10223011B2
公开(公告)日:2019-03-05
申请号:US15438644
申请日:2017-02-21
申请人: Hyejin Yim , Jinyub Lee , Kyung-Hwa Kang , Minseok Kim , Minsu Kim , Sung-Won Yun
发明人: Hyejin Yim , Jinyub Lee , Kyung-Hwa Kang , Minseok Kim , Minsu Kim , Sung-Won Yun
摘要: A storage device includes a nonvolatile memory device and a controller configured to generate a read command according to a request of an external host device and transmit the read command to the nonvolatile memory device. The nonvolatile memory device is configured to perform a read operation in response to the read command, to output read data to the controller, and to store information of the read operation in an internal register.
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