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    Wafer transfer robot having wafer blades equipped with sensors
    1.
    发明授权
    Wafer transfer robot having wafer blades equipped with sensors 失效
    具有装配有传感器的晶片叶片的晶片传送机器人

    公开(公告)号：US06808589B2

    公开(公告)日：2004-10-26

    申请号：US10171724

    申请日：2002-06-14

    申请人： Yu-Sheng Su ,  Chiang-Jen Peng ,  Pin-Chia Su ,  Wen-Lang Wu

    发明人： Yu-Sheng Su ,  Chiang-Jen Peng ,  Pin-Chia Su ,  Wen-Lang Wu

    IPC分类号： B68G6800

    CPC分类号： H01L21/67259 ,  H01L21/67253 ,  H01L21/67781

    摘要： A wafer transfer robot for a wafer processing system, such as a wet bench system, and a method for utilizing the robot. The wafer transfer robot can be constructed by a robot arm that is equipped with a plurality of wafer blades each adapted for picking-up and carrying one of a plurality of wafers. The plurality of wafer blades each has a predetermined thickness, a top surface, a bottom surface and a predetermined spacing from adjacent wafer blades. A plurality of sensors, such as optical sensors, capacitance sensors or magnetic sensors, with at least one mounted on the bottom side of one of the plurality of wafer blades for sensing the presence of metal on a wafer carried on an adjacent wafer blade immediately below the one of the plurality of wafer blades.

    摘要翻译： 用于晶片处理系统的晶片传送机器人，例如湿台架系统，以及利用该机器人的方法。 晶片传送机器人可以由装备有多个晶片叶片的机器人手臂构成，每个晶片叶片适于拾取和携带多个晶片中的一个。 多个晶片叶片各自具有预定的厚度，顶表面，底表面和与相邻晶片刀片的预定间隔。 多个传感器，例如光学传感器，电容传感器或磁性传感器，其中至少一个传感器安装在多个晶片刀片之一的底侧上，用于感测在紧邻下方的相邻晶片刀片上承载在晶片上的金属的存在 多个晶片刀片中的一个。

    SILICON WAFER RECLAMATION PROCESS
    2.
    发明申请
    SILICON WAFER RECLAMATION PROCESS 有权
    硅胶回收工艺

    公开(公告)号：US20110062375A1

    公开(公告)日：2011-03-17

    申请号：US12952540

    申请日：2010-11-23

    申请人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

    发明人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

    IPC分类号： C09K13/08

    CPC分类号： H01L21/02032 ,  H01L21/31111

    摘要： An etchant for removing a porous low-k dielectric layer on a semiconductor substrate includes a hydrofluoric acid-based solvent, a dilating additive for dilating the pores in the porous low-k dielectric, and a passivating additive that forms a passivation layer at the interface between the low-k dielectric layer and the semiconductor substrate.

    摘要翻译： 用于去除半导体衬底上的多孔低k电介质层的蚀刻剂包括氢氟酸溶剂，用于膨胀多孔低k电介质中的孔的扩张添加剂和在界面处形成钝化层的钝化添加剂 在低k电介质层和半导体衬底之间。

    SILICON WAFER RECLAMATION PROCESS
    3.
    发明申请
    SILICON WAFER RECLAMATION PROCESS 有权
    硅胶回收工艺

    公开(公告)号：US20090111269A1

    公开(公告)日：2009-04-30

    申请号：US11931796

    申请日：2007-10-31

    申请人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

    发明人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

    IPC分类号： H01L21/311 ,  C09K13/08

    CPC分类号： H01L21/02032 ,  H01L21/31111

    摘要： By exposing a process control wafer having a porous low-k-dielectric layer thereon in an HF-based low-k dielectric etching solvent comprising a dilating additive and a passivating additive, the pores in the low-k dielectric layer are dilated some of which connect with one another to form one or more continuous channels extending through the thickness of the dielectric layer and allowing the HF-based solvent to reach down to the substrate. Then the passivating additive component of the HF-based etching solvent forms a passivation layer at the dielectric layer and the substrate interface that protects substrate from the HF-based etchant.

    摘要翻译： 通过在包含扩张添加剂和钝化添加剂的基于HF的低k电介质蚀刻溶剂中暴露其上具有多孔低k电介质层的工艺控制晶片，低k电介质层中的孔被扩大其中一些 彼此连接以形成延伸穿过介电层厚度的一个或多个连续通道，并允许基于HF的溶剂到达基底。 然后，基于HF的蚀刻溶剂的钝化添加剂组分在介电层和衬底界面处形成钝化层，保护衬底免受基于HF的蚀刻剂的影响。

    Silicon wafer reclamation process
    4.
    发明授权
    Silicon wafer reclamation process 有权
    硅片回收工艺

    公开(公告)号：US07851374B2

    公开(公告)日：2010-12-14

    申请号：US11931796

    申请日：2007-10-31

    申请人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

    发明人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

    IPC分类号： H01L21/302 ,  H01L21/461

    CPC分类号： H01L21/02032 ,  H01L21/31111

    摘要： By exposing a process control wafer having a porous low-k-dielectric layer thereon in an HF-based low-k dielectric etching solvent comprising a dilating additive and a passivating additive, the pores in the low-k dielectric layer are dilated some of which connect with one another to form one or more continuous channels extending through the thickness of the dielectric layer and allowing the HF-based solvent to reach down to the substrate. Then the passivating additive component of the HF-based etching solvent forms a passivation layer at the dielectric layer and the substrate interface that protects substrate from the HF-based etchant.

    摘要翻译： 通过在包含扩张添加剂和钝化添加剂的基于HF的低k电介质蚀刻溶剂中暴露其上具有多孔低k电介质层的工艺控制晶片，低k电介质层中的孔被扩大其中一些 彼此连接以形成延伸穿过介电层厚度的一个或多个连续通道，并允许基于HF的溶剂到达基底。 然后，基于HF的蚀刻溶剂的钝化添加剂组分在介电层和衬底界面处形成钝化层，保护衬底免受基于HF的蚀刻剂的影响。

    METHOD AND SYSTEM FOR IMPROVING WET CHEMICAL BATH PROCESS STABILITY AND PRODUCTIVITY IN SEMICONDUCTOR MANUFACTURING
    6.
    发明申请
    METHOD AND SYSTEM FOR IMPROVING WET CHEMICAL BATH PROCESS STABILITY AND PRODUCTIVITY IN SEMICONDUCTOR MANUFACTURING 有权
    用于改善半导体制造中的湿化学浴过程稳定性和生产率的方法和系统

    公开(公告)号：US20090087929A1

    公开(公告)日：2009-04-02

    申请号：US11963040

    申请日：2007-12-21

    申请人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li Te Hsu ,  Jin Lin Liang ,  Shih Cheng Yeh ,  Pin Chia Su

    发明人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li Te Hsu ,  Jin Lin Liang ,  Shih Cheng Yeh ,  Pin Chia Su

    IPC分类号： H01L21/66

    CPC分类号： H01L21/67086 ,  H01L21/67253

    摘要： A chemical processing bath and system used in semiconductor manufacturing utilizes a dynamic spiking model that essentially constantly monitors chemical concentration in the processing bath and adds fresh chemical on a regular basis to maintain chemical concentrations at desirable levels. Etch rates and etch selectivities are maintained at desirable levels and contamination from undesirable precipitation is avoided. The system and method automatically compare concentration levels to a plurality of control limits associated with various technologies and identify the technology or technologies that may undergo processing.

    摘要翻译： 用于半导体制造的化学处理浴和系统利用动态加标模型，其基本上不断监测处理槽中的化学浓度，并定期添加新鲜化学品，以将化学浓度维持在所需水平。 蚀刻速率和蚀刻选择性保持在所需的水平，避免了不期望的沉淀的污染。 系统和方法自动将浓度水平与与各种技术相关联的多个控制限制进行比较，并识别可能经历处理的技术或技术。

    Silicon wafer reclamation process
    7.
    发明授权
    Silicon wafer reclamation process 有权
    硅片回收工艺

    公开(公告)号：US08696930B2

    公开(公告)日：2014-04-15

    申请号：US12952540

    申请日：2010-11-23

    申请人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

    发明人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

    IPC分类号： C09K13/08

    CPC分类号： H01L21/02032 ,  H01L21/31111

    摘要： An etchant for removing a porous low-k dielectric layer on a semiconductor substrate includes a hydrofluoric acid-based solvent, a dilating additive for dilating the pores in the porous low-k dielectric, and a passivating additive that forms a passivation layer at the interface between the low-k dielectric layer and the semiconductor substrate.

    摘要翻译： 用于去除半导体衬底上的多孔低k电介质层的蚀刻剂包括氢氟酸溶剂，用于膨胀多孔低k电介质中的孔的扩张添加剂和在界面处形成钝化层的钝化添加剂 在低k电介质层和半导体衬底之间。

    Method and system for improving wet chemical bath process stability and productivity in semiconductor manufacturing
    8.
    发明授权
    Method and system for improving wet chemical bath process stability and productivity in semiconductor manufacturing 有权
    改善半导体制造中湿化学浴工艺稳定性和生产率的方法和系统

    公开(公告)号：US07910014B2

    公开(公告)日：2011-03-22

    申请号：US11963040

    申请日：2007-12-21

    申请人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li Te Hsu ,  Jin Lin Liang ,  Shih Cheng Yeh ,  Pin Chia Su

    发明人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li Te Hsu ,  Jin Lin Liang ,  Shih Cheng Yeh ,  Pin Chia Su

    IPC分类号： C03C15/00 ,  C03C25/68

    CPC分类号： H01L21/67086 ,  H01L21/67253

    摘要： A chemical processing bath and system used in semiconductor manufacturing utilizes a dynamic spiking model that essentially constantly monitors chemical concentration in the processing bath and adds fresh chemical on a regular basis to maintain chemical concentrations at desirable levels. Etch rates and etch selectivities are maintained at desirable levels and contamination from undesirable precipitation is avoided. The system and method automatically compare concentration levels to a plurality of control limits associated with various technologies and identify the technology or technologies that may undergo processing.

    摘要翻译： 用于半导体制造的化学处理浴和系统利用动态加标模型，其基本上不断监测处理槽中的化学浓度，并定期添加新鲜化学品，以将化学浓度维持在所需水平。 蚀刻速率和蚀刻选择性保持在所需的水平，避免了不期望的沉淀的污染。 系统和方法自动将浓度水平与与各种技术相关联的多个控制限制进行比较，并识别可能经历处理的技术或技术。

    CONTROL WAFER RECLAMATION PROCESS
    9.
    发明申请
    CONTROL WAFER RECLAMATION PROCESS 审中-公开
    控制波形恢复过程

    公开(公告)号：US20090233447A1

    公开(公告)日：2009-09-17

    申请号：US12046096

    申请日：2008-03-11

    申请人： Jin-Lin Liang ,  Yu-Sheng Su ,  Tai-Yung Yu ,  Perre Kao ,  Pin-Chia Su ,  Li Te Hsu

    发明人： Jin-Lin Liang ,  Yu-Sheng Su ,  Tai-Yung Yu ,  Perre Kao ,  Pin-Chia Su ,  Li Te Hsu

    IPC分类号： H01L21/461

    CPC分类号： H01L21/02032 ,  H01L21/02079 ,  H01L21/31111 ,  H01L21/31116

    摘要： A method of recycling a control wafer having a dielectric layer deposited thereon involves removing most of the dielectric layer by plasma etching leaving a residual film of the dielectric and then removing the residual dielectric film by a wet etching process. The combination of the dry and wet etching provides effective removal of the dielectric material without damaging the wafer substrate and any residual wet etching byproduct particulate remaining on the wafer substrate is then removed by APM cleaning and scrubbing.

    摘要翻译： 回收具有沉积在其上的电介质层的控制晶片的方法包括通过等离子体蚀刻去除大部分介电层，留下电介质的残留膜，然后通过湿蚀刻工艺去除残留的电介质膜。 干蚀刻和湿蚀刻的组合提供有效去除电介质材料而不损坏晶片衬底，然后通过APM清洁和擦洗除去留在晶片衬底上的任何残留的湿蚀刻副产物颗粒。

    WET PROCESSING APPARATUSES
    10.
    发明申请
    WET PROCESSING APPARATUSES 有权
    湿处理设备

    公开(公告)号：US20080295874A1

    公开(公告)日：2008-12-04

    申请号：US11754843

    申请日：2007-05-29

    申请人： Kuang-Nian Tang ,  Yang-Kai Fan ,  Yu-Sheng Su ,  Ming-Tsao Chiang ,  Yu-Cheng Shih

    发明人： Kuang-Nian Tang ,  Yang-Kai Fan ,  Yu-Sheng Su ,  Ming-Tsao Chiang ,  Yu-Cheng Shih

    IPC分类号： B08B3/10

    CPC分类号： H01L21/67023 ,  H01L21/67057

    摘要： A semiconductor apparatus includes a first tank configured to accommodate a first fluid. A second tank is configured to receive overflow of the first fluid into an upper portion of the second tank and to accommodate a second fluid. A cycling system including a first conduit is configured between the first tank and the second tank. The first conduit has an end substantially below a surface of the second fluid. A fluid providing system including a second conduit is fluidly coupled to the second tank and configured to provide the second fluid into the second tank. The second conduit has an end substantially below the surface of the second fluid. An overflow system is coupled to the second tank and configured to remove an upper portion of the second fluid when the surface of the second fluid is substantially equal to or higher than a pre-determined level.

    摘要翻译： 半导体装置包括配置成容纳第一流体的第一罐。 第二罐被配置为接收第一流体溢流到第二罐的上部并容纳第二流体。 包括第一管道的循环系统配置在第一罐和第二罐之间。 第一导管具有基本上低于第二流体表面的端部。 包括第二导管的流体提供系统流体地联接到第二罐并且被配置为将第二流体提供到第二罐中。 第二导管具有基本上低于第二流体表面的端部。 溢流系统联接到第二罐，并且构造成当第二流体的表面基本上等于或高于预定水平时，去除第二流体的上部。