公开(公告)号：US12050910B2

公开(公告)日：2024-07-30

申请号：US17427832

申请日：2020-02-20

申请人： Optimum Semiconductor Technologies Inc.

发明人： Mayan Moudgill ,  Pablo Balzola ,  Murugappan Senthivelan ,  Vaidyanathan Ramdurai ,  Sitij Agrawal

IPC分类号： G06F9/30 ,  G06F5/01 ,  G06F7/544 ,  G06F7/548 ,  G06F17/17

CPC分类号： G06F9/3001 ,  G06F7/5446 ,  G06F7/548 ,  G06F9/3013 ,  G06F17/17 ,  G06F5/01

摘要： A system and an accelerator circuit including a register file comprising instruction registers to store a trigonometric calculation instruction for evaluating a trigonometric function, and data registers comprising a first data register to store a floating-point input value associated with the trigonometric calculation instruction. The accelerator circuit further includes a determination circuit to identify the trigonometric calculation function and the floating-point input value associated with the trigonometric calculation instruction and determine whether the floating-point input value is in a small value range, and an approximation circuit to responsive to determining that the floating-point input value is in the small value, receive the floating-point input value and calculate an approximation of the trigonometric function with respect to the input value.

公开(公告)号：US12007234B2

公开(公告)日：2024-06-11

申请号：US17505715

申请日：2021-10-20

申请人： Allegro MicroSystems, LLC

发明人： Cristian Trinidad ,  Nicolás Rigoni

IPC分类号： G01B7/30 ,  G01R33/07 ,  G06F7/544

CPC分类号： G01B7/30 ,  G01R33/072 ,  G06F7/5446

摘要： A magnetic field sensor configured to sense an angle of a magnetic field associated with a rotatable target includes a first magnetic field sensing structure configured to generate a first signal indicative of the magnetic field and a second magnetic field sensing structure configured to generate a second signal indicative of the magnetic field, wherein the first and second magnetic field sensing structures are configured to detect quadrature components of the magnetic field. A controller responsive to the first and second signals includes an angle tracking observer having a sine block and a cosine block operatively coupled to compute the angular position of the target using a control loop based in part on a non-orthogonality error term and a magnitude calculator that uses the sine block and the cosine block to compute a magnitude of the magnetic field.

公开(公告)号：US11928465B2

公开(公告)日：2024-03-12

申请号：US17427843

申请日：2020-02-20

申请人： Optimum Semiconductor Technologies Inc.

发明人： Mayan Moudgill ,  Pablo Balzola ,  Murugappan Senthivelan ,  Vaidyanathan Ramdurai ,  Sitij Agrawal

IPC分类号： G06F9/30 ,  G06F7/544 ,  G06F7/548 ,  G06F17/17 ,  G06F5/01

CPC分类号： G06F9/3001 ,  G06F7/5446 ,  G06F7/548 ,  G06F9/3013 ,  G06F17/17 ,  G06F5/01

摘要： A system and an accelerator circuit including a register file comprising instruction registers to store an instruction for evaluating an elementary function, and data registers comprising a first data register to store an input value. The accelerator circuit further includes a successive cumulative rotation circuit comprising a reconfigurable inner stage to perform a successive cumulative rotation recurrence, and a determination circuit to determine a type of the elementary function based on the instruction, and responsive to determining that the input value is a fixed-point number, configure the reconfigurable inner stage to a configuration for evaluating the type of the elementary function, wherein the successive cumulative rotation circuit is to calculate an evaluation of the elementary function using the reconfigurable inner stage performing the successive cumulative rotation recurrence.

公开(公告)号：US09354844B2

公开(公告)日：2016-05-31

申请号：US13709450

申请日：2012-12-10

申请人： Intel Mobile Communications GmbH

发明人： Andreas Boehme ,  Andreas Menkhoff

IPC分类号： G06F7/544 ,  G06F7/548

CPC分类号： G06F7/548 ,  G06F7/5446

摘要： A method and an apparatus are described which determine at least one output value based on at least one input value. The input value is provided to a processing unit, wherein a combination of intermediate values is iteratively calculated. Each intermediate value is calculated during an iteration such that the intermediate value for each iteration is buffered, using a buffer storage. Based on the combination of the buffered intermediate values a storage is accessed, the storage storing a plurality of first output values, each first output value associated with a respective combination of the buffered intermediate values, so that the first output value is output.

摘要翻译： 描述了基于至少一个输入值来确定至少一个输出值的方法和装置。 将输入值提供给处理单元，其中迭代地计算中间值的组合。 在迭代期间计算每个中间值，以便使用缓冲存储器缓冲每个迭代的中间值。 基于缓冲的中间值的组合，访问存储器，存储器存储多个第一输出值，每个第一输出值与缓冲的中间值的相应组合相关联，使得输出第一输出值。

公开(公告)号：US08572152B2

公开(公告)日：2013-10-29

申请号：US12919632

申请日：2009-03-05

申请人： Katsutoshi Seki

发明人： Katsutoshi Seki

IPC分类号： G06F7/38

CPC分类号： G06F7/5446 ,  G06T3/604

摘要： Disclosed is a CORDIC circuit in which scale correction process is divided into two stages: rough correction and fine correction, and a second-process of a pseudo-rotation process is performed in parallel with the fine scale correction. A range of the fine scale correction is set so that it is not necessary to perform a scale correction with regard to a remaining rotation angle of the first half of the pseudo-rotation process.

摘要翻译： 公开了一种CORDIC电路，其中缩放校正处理被分为两个阶段：粗略校正和精细校正，并且与精细刻度校正并行执行伪旋转处理的第二处理。 精确刻度校正的范围被设定为不需要对伪旋转处理的前半部分的剩余旋转角进行刻度校正。

公开(公告)号：US08572150B1

公开(公告)日：2013-10-29

申请号：US11973093

申请日：2007-10-05

申请人： Christopher H. Dick

发明人： Christopher H. Dick

IPC分类号： G06F7/38

CPC分类号： G06F7/5446

摘要： Parameterization of a CORDIC algorithm for providing a CORDIC engine is described. An aspect of the invention is a method in a digital processing system for generation of the CORDIC engine. Numbers of fractional output bits for a user-defined numerical result format are obtained. The numbers of fractional output bits are for each of a plurality of output variables associated with the CORDIC algorithm. Micro-rotations associated with each of the plurality of output variables are determined responsive to the numbers of fractional output bits. Quantizations associated with each of the plurality of output variables are determined responsive at least in part to the numbers of fractional output bits.

摘要翻译： 描述了用于提供CORDIC引擎的CORDIC算法的参数化。 本发明的一个方面是用于生成CORDIC发动机的数字处理系统中的方法。 获得用户定义的数字结果格式的分数输出位数。 对于与CORDIC算法相关联的多个输出变量中的每一个，分数输出位的数目。 响应于分数输出比特的数量确定与多个输出变量中的每一个相关联的微旋转。 至少部分地响应于分数输出比特的数量来确定与多个输出变量中的每一个相关联的量化。

公开(公告)号：US20110225222A1

公开(公告)日：2011-09-15

申请号：US12724302

申请日：2010-03-15

申请人： Manoj Gunwani ,  Harekrishna Verma

发明人： Manoj Gunwani ,  Harekrishna Verma

IPC分类号： G06F17/16 ,  G06F5/01

CPC分类号： G06F7/5446

摘要： A CORDIC engine includes an N-stage CORDIC processor for performing N micro-iterations of a CORDIC algorithm and generating a 3-vector CORDIC output responsive to a 3-vector CORDIC input. A counter counts a number of M macro-iterations for the CORDIC algorithm and indicates a start of the cycle iterations. A multiplexer selects an input to the N-stage CORDIC processor as the 3-vector CORDIC input at the start of the cycle iterations or the 3-vector CORDIC output at other times. The CORDIC algorithm is complete after N*M clock cycles by generating N micro-iterations for each of the M macro-iterations. In some embodiments, the CORDIC engine is coupled to programmable logic blocks as part of a programmable logic array.

摘要翻译： CORDIC引擎包括N级CORDIC处理器，用于执行CORDIC算法的N个微迭代，并响应于3向量CORDIC输入生成3向量CORDIC输出。 一个计数器计数CORDIC算法的M个宏迭代次数，并指示周期迭代的开始。 复用器在循环迭代开始时将N级CORDIC处理器的输入选择为3向量CORDIC输入，或者在其他时间选择3向量CORDIC输出。 CORDIC算法在N * M个时钟周期之后通过为M个宏迭代中的每一个生成N个微迭代来完成。 在一些实施例中，作为可编程逻辑阵列的一部分，CORDIC引擎耦合到可编程逻辑块。

公开(公告)号：US20110119520A1

公开(公告)日：2011-05-19

申请号：US12944629

申请日：2010-11-11

申请人： Shoab A. Khan ,  Rehan Hameed ,  Hassan Farooq

发明人： Shoab A. Khan ,  Rehan Hameed ,  Hassan Farooq

IPC分类号： G06F1/06 ,  G06F1/02 ,  G06F17/15 ,  G06F7/548

CPC分类号： G06F7/57 ,  G06F7/5446 ,  G06F9/3867 ,  G06F9/3879 ,  G06F2207/3884

摘要： The present invention relates to digital signal processors with an integrated module configured to compute a Coordinate Rotation Digital Computer (CORDIC) in a pipeline. The pipelined module can advantageously complete computation of one CORDIC computation for each clock pulse applied to the CORDIC module, thereby providing a CORDIC computation for each clock pulse. One embodiment advantageously computes a first portion of a computation with a lookup table and a second portion in accordance with a CORDIC algorithm. Advantageously, data in a CORDIC pipeline is automatically advanced in response to read instructions and can be automatically advanced from the beginning of the pipeline to the end of the pipeline to reinitialize the pipeline. This allows information to be retrieved from the CORDIC pipeline with relatively little overhead. The automatic starting and stopping of the CORDIC pipeline advantageously allows the retrieval of computations from efficient pipeline architectures on an as-needed basis.

摘要翻译： 本发明涉及具有集成模块的数字信号处理器，其被配置为在流水线中计算坐标旋转数字计算机（CORDIC）。 流水线模块可以有利地完成对施加到CORDIC模块的每个时钟脉冲的一个CORDIC计算的计算，从而为每个时钟脉冲提供CORDIC计算。 一个实施例有利地根据CORDIC算法利用查找表和第二部分来计算计算的第一部分。 有利地，CORDIC流水线中的数据响应于读取指令而自动进行，并且可以从流水线的开始自动地前进到流水线的末端以重新初始化流水线。 这允许以较少的开销从CORDIC管道检索信息。 CORDIC管道的自动启动和停止有利地允许根据需要从有效管道架构中检索计算。

公开(公告)号：US20070198625A1

公开(公告)日：2007-08-23

申请号：US11783393

申请日：2007-04-09

申请人： Arthur Torosyan

发明人： Arthur Torosyan

IPC分类号： G06F7/38

CPC分类号： G06F7/5446

摘要： An angle rotator performs angle rotation of an input complex signal in the complex plane according to an angle θ. The angle rotator includes a coarse stage rotation and a fine stage rotation. The two specific amounts of rotation are obtained directly from the original angle, without performing iterations as are performed by known CORDIC-type methods. The coarse stage rotation is performed using truncated approximations for the cosine θM and the sine θM, where θM is a radian angle that corresponds to a most significant word (MSW) of the input angle θ. The fine stage rotation is performed using one or more error values that compensate for approximations and quantization errors associated with the coarse stage rotation. By partitioning the rotation into coarse and fine rotation stages, a two stage structure is obtained that requires much less hardware than a single-stage rotator, without sacrificing angle precision. This can occur because the two-stage rotator stores pre-computed cosine θM and the sine θM values in a small lookup table (e.g. memory device) for fast retrieval. Furthermore, the angle rotator consolidates all operations into a small number of reduced-size multipliers, enabling the use of efficient multiplier implementations, such as Booth encoding, thereby yielding a smaller and faster overall circuit. When higher precision is desired, more accurate results can be attained simply by increasing the wordlength and the multiplier size, without significantly increasing overall circuit latency.

摘要翻译： 角度旋转器根据角度θ执行复平面中的输入复信号的角度旋转。 角度旋转器包括粗级旋转和精细级旋转。 直接从原始角度获得两个特定的旋转量，而不会像已知的CORDIC型方法那样进行迭代。 使用用于余弦θM和正弦θM的截距近似来执行粗阶段旋转，其中θ是与对应的弧度角 到输入角θ的最高有效字（MSW）。 使用补偿与粗级旋转相关联的近似和量化误差的一个或多个误差值来执行精细级旋转。 通过将旋转分割成粗略和精细的旋转阶段，获得了比单级旋转器少得多的硬件的两级结构，而不牺牲角度精度。 这可以发生，因为两级旋转器在小查找表（例如存储器件）中存储预计算的余弦θ和正弦值，以便快速检索。 此外，角度旋转器将所有操作整合为少量的小尺寸乘法器，使得能够使用诸如布斯编码的有效乘法器实现，从而产生越来越小的总体电路。 当需要更高的精度时，可以通过增加字长和乘数大小来获得更精确的结果，而不会显着增加总体电路的延迟。

公开(公告)号：US20060200510A1

公开(公告)日：2006-09-07

申请号：US11346754

申请日：2006-01-30

申请人： Cindy Wang ,  Xiangyang Xu ,  Xiaochun Chen

发明人： Cindy Wang ,  Xiangyang Xu ,  Xiaochun Chen

IPC分类号： G06F15/00

CPC分类号： G06F7/4818 ,  G06F7/49921 ,  G06F7/49947 ,  G06F7/5446 ,  H04L27/227 ,  H04L2027/0026 ,  H04L2027/003

摘要： A CORDIC angle calculator for a baseband IC receiver incorporates a CORDIC algorithm calculating processor with an input scaling means receiving input data, scaling the input data and providing it to the CORDIC processor. An output scaling means receives output data from the CORDIC processor and rescales the output data to provide a calculated angle. In an exemplary embodiment, the input scaling means includes means for shifting the input data for bit reduction and providing a shift signal corresponding to the input data shift and wherein the output scaling means is responsive to the shift signal.

摘要翻译： 用于基带IC接收机的CORDIC角度计算器包括CORDIC算法计算处理器和输入缩放装置接收输入数据，缩放输入数据并将其提供给CORDIC处理器。 输出缩放装置从CORDIC处理器接收输出数据并重新调整输出数据以提供计算出的角度。 在示例性实施例中，输入缩放装置包括用于移位用于比特减少的输入数据并提供对应于输入数据移位的移位信号的装置，并且其中输出缩放装置响应于移位信号。