Host CPU independent video processing unit
    91.
    发明授权
    Host CPU independent video processing unit 失效
    主机CPU独立视频处理单元

    公开(公告)号:US5793445A

    公开(公告)日:1998-08-11

    申请号:US667872

    申请日:1996-06-20

    CPC classification number: G09G5/36

    Abstract: The present invention relates to a video display processor comprised apparatus for receiving digital input signal components of a signal to be displayed, apparatus for converting the components to a desired format, apparatus for scaling and blending the signals in the desired format, apparatus for outputting the scaled and blended signals for display or further processing, and an arbiter and local timing apparatus for controlling the apparatus substantially independently of a host CPU.

    Abstract translation: 本发明涉及一种视频显示处理器,包括用于接收要显示的信号的数字输入信号分量的装置,用于将所述分量转换成所需格式的装置,用于缩放和混合所需格式的信号的装置, 用于显示或进一步处理的缩放和混合信号,以及用于基本上独立于主机CPU来控制设备的仲裁器和本地定时装置。

    Method and apparatus for scaling and blending an image to be displayed
    92.
    发明授权
    Method and apparatus for scaling and blending an image to be displayed 失效
    用于缩放和混合要显示的图像的方法和装置

    公开(公告)号:US5764238A

    公开(公告)日:1998-06-09

    申请号:US118896

    申请日:1993-09-10

    CPC classification number: G06T3/4007 G06T2200/28

    Abstract: The present invention relates to an image scaler comprised of apparatus for receiving coefficients a and b and image display values of adjacent pixels P and Q respective of an image, apparatus for repeatedly operating on the coefficients and values for successive pixels according to the transform ##EQU1## where SUM is the sum of the coefficients, R is either zero or the accumulated SUM of an immediately preceding operation, A.sub.cc is an accumulated result signal, and apparatus for providing a first result signal as an output coefficient word for controlling the display of each of adjacent pixels.

    Abstract translation: 本发明涉及一种图像缩放器,包括用于接收系数a和b的装置和相应于图像的相邻像素P和Q的图像显示值,用于根据变换其中SUM是系数的和,R是零或紧接在前的操作的累积SUM,Acc是累积结果信号,以及用于提供第一结果信号作为输出系数字的装置,用于控制每个 的相邻像素。

    Accelerated full screen video playback
    93.
    发明授权
    Accelerated full screen video playback 失效
    加速全屏视频播放

    公开(公告)号:US5742272A

    公开(公告)日:1998-04-21

    申请号:US638808

    申请日:1996-04-29

    CPC classification number: G09G5/393 G09G5/391

    Abstract: A method of drawing moving images on a graphics display comprising (a) receiving data defining an input image in a predetermined resolution, (b) commanding a graphics processor to draw a corresponding image frame on a display having a number of scanning lines which is a multiple m of a number of scanning lines of the input image and a multiple n of a number of pixels in a horizontal line of the input image, (c) drawing successive lines of the input image on a first and on each m.sup.th scanning line of the graphics display, while stretching each pixel on each drawn line over n pixels, (d) copying each drawn line on respective immediately following m-1 lines, and (e) repeating steps (b)-(d) for successive frames of the input image.

    Abstract translation: 一种在图形显示器上绘制运动图像的方法,包括:(a)接收以预定分辨率定义输入图像的数据,(b)命令图形处理器在具有多条扫描线的显示器上绘制相应的图像帧, 输入图像的多个扫描线的多个m和输入图像的水平线中的多个像素的多个n,(c)在第一扫描线和第m扫描线的第m扫描线上绘制输入图像的连续行 图形显示,同时在n个像素上拉伸每个绘制线上的每个像素,(d)将各个绘制的线复制在相应的紧跟m-1线上,以及(e)对于连续的帧的重复步骤(b) - (d) 输入图像。

    Method of linking peripheral devices all of which use the same IRQ to a
single interrupt procedure
    94.
    发明授权
    Method of linking peripheral devices all of which use the same IRQ to a single interrupt procedure 失效
    将所有使用相同IRQ的外围设备连接到单个中断过程的方法

    公开(公告)号:US5734911A

    公开(公告)日:1998-03-31

    申请号:US569601

    申请日:1995-12-08

    Applicant: Arthur Lai

    Inventor: Arthur Lai

    Abstract: A method of linking peripheral devices to a single interrupt procedure in a computer is comprised of storing in an interrupt vector table of a BIOS ROM, a first pointer to an interrupt service routine related to one of a group of peripheral devices which use the same interrupt request (IRQ) on the same software interrupt vector, and storing further pointer in each one of the peripheral devices to another unique one of the peripheral devices in the group.

    Abstract translation: 将外围设备连接到计算机中的单个中断过程的方法包括存储在BIOS ROM的中断向量表中,与指向使用相同中断的一组外围设备之一的中断服务程序的第一指针 请求(IRQ)在相同的软件中断向量上,并且将每个外围设备中的另外的指针存储到组中的另外唯一的外围设备中。

    Phase offset cancellation technique for reducing low frequency jitters
    95.
    发明授权
    Phase offset cancellation technique for reducing low frequency jitters 失效
    减少低频抖动的相位偏移消除技术

    公开(公告)号:US5699387A

    公开(公告)日:1997-12-16

    申请号:US80183

    申请日:1993-06-23

    CPC classification number: H04L7/033 H03L7/0895

    Abstract: A phase locked loop is comprised of a phase-frequency detector for providing to a charge pump up and down pulse signals having pulse widths proportional to phase differences between a pair of signals applied thereto, apparatus for introducing a relative phase difference between a first clock signal and a second signal to provide the pair of signals, the second signal being synchronized with an output signal of the loop, apparatus for providing a third up or down signal to the charge pump offsetting the effect of the introduced phase difference, and apparatus for obtaining a loop control voltage from the charge pump.

    Abstract translation: 锁相环由相位频率检测器构成,用于向电荷泵提供上下脉冲信号,脉冲信号具有与施加到其上的一对信号之间的相位差成比例的脉冲宽度;用于引入第一时钟信号之间的相对相位差的装置 以及提供所述一对信号的第二信号,所述第二信号与所述环路的输出信号同步,用于向抵消引入的相位差的影响的电荷泵提供第三上升或下降信号的装置,以及用于获得 来自电荷泵的回路控制电压。

    Voltage controlled ring oscillator having level translator in output
    96.
    发明授权
    Voltage controlled ring oscillator having level translator in output 失效
    输出电平转换器的压控环形振荡器

    公开(公告)号:US5682123A

    公开(公告)日:1997-10-28

    申请号:US366922

    申请日:1994-12-30

    Applicant: Raymond Chau

    Inventor: Raymond Chau

    CPC classification number: H03K3/0315

    Abstract: A voltage controlled oscillator comprised of a current controlled oscillator formed of a loop of serially connected inverters, the oscillator having a primary output at an output of one of the inverters for providing a primary pulse signal and a secondary output at the output of another inverter spaced from the one inverter by an odd number of inverters for providing a secondary pulse signal which is in antiphase to the primary pulse signal, apparatus for receiving the primary and secondary pulse signals and for providing an output signal which indicates the presence of a rising or falling edge to a corresponding primary or secondary pulse signal during a transmission time delay provided by the odd number of inverters.

    Abstract translation: 一种压控振荡器,包括由串联连接的反相器的环路形成的电流控制振荡器,所述振荡器在一个反相器的输出端具有初级输出,用于在另一个反相器的输出端提供初级脉冲信号和次级输出间隔 从一个反相器通过奇数个反相器提供用于提供与初级脉冲信号相反的次级脉冲信号的装置,用于接收主要和次要脉冲信号的装置,以及用于提供指示存在上升或下降的输出信号 在由奇数个逆变器提供的传输时间延迟期间边缘到相应的初级或次级脉冲信号。

    Folding stereoscopic computer display
    97.
    发明授权
    Folding stereoscopic computer display 失效
    折叠立体电脑显示

    公开(公告)号:US5598282A

    公开(公告)日:1997-01-28

    申请号:US323875

    申请日:1994-10-17

    CPC classification number: H04N13/0434 G02B27/26

    Abstract: A stereoscopic display is comprised of a pair of display apparatus having faces mutually oriented between approximately 90.degree. and 120.degree. to each other, apparatus for polarizing light from images displayed on the respective display apparatus, light from one image being polarized orthogonally to the light from the other image, a semitransparent mirror disposed between and approximately bisecting the angle between the pair of display apparatus for transmitting light from an image displayed on one display apparatus and reflecting light from an image displayed on the other display apparatus, toward a viewing position.

    Abstract translation: 立体显示器包括一对显示装置,其具有相互取向在大约90度和120度之间的面,用于使来自显示在各个显示装置上的图像的光偏振的装置,来自一个图像的光正交于与来自 另一图像,设置在用于从在一个显示装置上显示的图像传输光的一对显示装置之间的角度并近似平分的半透明反射镜中,将来自显示在另一显示装置上的图像的光反射到观看位置。

    Digital color video image enhancement for a diffusion dither circuit
    98.
    发明授权
    Digital color video image enhancement for a diffusion dither circuit 失效
    扩散抖动电路的数字彩色视频图像增强

    公开(公告)号:US5479594A

    公开(公告)日:1995-12-26

    申请号:US118634

    申请日:1993-09-10

    Applicant: Sanford S. Lum

    Inventor: Sanford S. Lum

    CPC classification number: H04N1/648 G06T5/20

    Abstract: Enhancing each pixel of a digital color video image by, for each component part of a source pixel, successively adding a truncation error of an immediately preceding previous pixel in an X direction to a current pixel. A resulting value is truncated to form a truncation error and most significant bits, and the most significant bits are provided to a destination line.

    Abstract translation: 通过对源像素的每个分量部分增强数字彩色视频图像的每个像素,将X方向上的紧接在前的先前像素的截断误差连续地添加到当前像素。 结果值被截断以形成截断错误和最高有效位,最高有效位被提供给目标行。

    Voltage to current converter with independent loop gain and frequency
control
    99.
    发明授权
    Voltage to current converter with independent loop gain and frequency control 失效
    具有独立环路增益和频率控制的电压到电流转换器

    公开(公告)号:US5459653A

    公开(公告)日:1995-10-17

    申请号:US80111

    申请日:1993-06-23

    CPC classification number: H03L7/099 H03L7/093 H03L7/0891 H03L7/0995 H03L7/18

    Abstract: A voltage to current converter is formed of a first current steering mirror which includes first binary weighted current mirror transistors and receives an input voltage signal and converts it to an output current. The converter also is formed of a second current mirror which generates a selectable output current, the second current mirror being formed of second binary weighted current mirror transistors. The output currents of the first current steering mirror and second current mirror are added and the sum is provided to the control input of a current controlled oscillator which can be used in a phase locked loop.

    Abstract translation: 电压 - 电流转换器由包括第一二进制加权电流镜晶体管并接收输入电压信号并将其转换为输出电流的第一电流导向镜形成。 转换器还由产生可选输出电流的第二电流镜形成,第二电流镜由第二二进制加权电流镜晶体管形成。 第一电流导流镜和第二电流镜的输出电流相加,并且将和提供给可在锁相环中使用的电流控制振荡器的控制输入。

    Flag-based high-speed I/O data transfer
    100.
    发明授权
    Flag-based high-speed I/O data transfer 失效
    基于标志的高速I / O数据传输

    公开(公告)号:US5450543A

    公开(公告)日:1995-09-12

    申请号:US320229

    申请日:1994-10-11

    Applicant: Gabriel Varga

    Inventor: Gabriel Varga

    CPC classification number: G09G5/39 G06F12/04 G09G5/393

    Abstract: A memory address pointer that selects a memory location that is mapped to a video graphics circuit port is incremented only when all bytes in a memory location have been read from or written to by the host CPU. This does not depend on the order in which the host CPU reads or writes data bytes. Therefore a video controller that uses the present invention will work with 8 bit, 16 bit as well as high performance 32 bit input/output instructions.

    Abstract translation: 只有存储器位置中的所有字节已被主机CPU读取或写入时,才会选择映射到视频图形电路端口的存储器位置的存储器地址指针。 这不取决于主机CPU读取或写入数据字节的顺序。 因此,使用本发明的视频控制器将使用8位,16位以及高性能32位输入/输出指令。

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