Abort installation of firmware bundles

    公开(公告)号:US11983519B2

    公开(公告)日:2024-05-14

    申请号:US17809392

    申请日:2022-06-28

    IPC分类号: G06F8/61 G06F8/65 G06F16/907

    CPC分类号: G06F8/61 G06F8/65 G06F16/907

    摘要: Examples of aborting installation of a firmware bundle are described. In an example, an abort installation command is received. The firmware bundle includes items, each item corresponding to one of a firmware for a hardware component and a system software component. A first set of items is identified from the items, where the first set of items includes one of an item installed successfully, an item for which installation is under progress, and a combination thereof. A second set of items is identified from the items, where the second set of items is pending installation. A first subset of items is identified from the second set, based on predefined dependency information, where operability of an item from the first set is dependent on an item from the first subset. The first subset of items is installed prior to aborting installation of the firmware bundle.

    EFFICIENT PORT RECONFIGURATION
    94.
    发明公开

    公开(公告)号:US20240154918A1

    公开(公告)日:2024-05-09

    申请号:US18414575

    申请日:2024-01-17

    摘要: A system for facilitating efficient port reconfiguration at a switch is provided. During operation, the system can identify a target port of the switch for reconfiguration based on one or more reconfiguration parameters indicating how a set of logical ports are generated from the target port. The system can disable the target port at the control plane of the switch, which disables features provided to the target port from the control plane. The control plane can provide a set of features supported by the switch at a port-level granularity for facilitating operations of the switch. The system can then configure the forwarding hardware based on the reconfiguration parameters to accommodate the set of logical ports. When the reconfiguration of the target port is complete, the system can enable a respective logical port at the control plane, which enables one or more features for the logical port from the control plane.

    FAST RESTART OF LARGE MEMORY SYSTEMS
    96.
    发明公开

    公开(公告)号:US20240152286A1

    公开(公告)日:2024-05-09

    申请号:US18407981

    申请日:2024-01-09

    IPC分类号: G06F3/06

    摘要: Utilizing a storage replica data structure includes receiving, at a hyper-kernel running on a computing node in a plurality of interconnected computing nodes, an indication of an operation pertaining to at least one of a guest physical memory address or a stable storage address. A guest operating system is run on a virtual environment that is defined by a set of hyper-kernels running on the plurality of interconnected computing nodes. It further includes updating a storage replica data structure. The storage replica data structure comprises a set of entries. The set of entries in the storage replica data structure comprises associations among guest physical memory addresses, physical memory addresses, and stable storage addresses

    RISER CAGE TO SUPPORT A CONNECTOR OF A RISER CARD

    公开(公告)号:US20240147648A1

    公开(公告)日:2024-05-02

    申请号:US18051183

    申请日:2022-10-31

    IPC分类号: H05K7/14

    CPC分类号: H05K7/1424

    摘要: A riser assembly may include a riser cage and a riser card. The riser cage includes sidewalls, a base extending from the sidewalls, and mounting features to mount the riser cage to a chassis of the electronic device. The base is coupled to the riser card positioned on a first side of the base. The base includes an opening to permit the connector to extend through the opening to protrude partially beyond the opening to a location on a second side of the base where the connector can detachably connect to an expansion card installed in the riser cage between the sidewalls. The base contacts the connector around the opening to provide lateral support to the connector on opposing faces (e.g., first sidewalls) of the connector.