公开(公告)号：US5689461A

公开(公告)日：1997-11-18

申请号：US469696

申请日：1995-06-06

申请人： Tetsuya Kaneko ,  Takashi Ohsawa

发明人： Tetsuya Kaneko ,  Takashi Ohsawa

IPC分类号： G11C11/409 ,  G11C5/14 ,  G11C7/12 ,  G11C8/08 ,  G11C11/407 ,  G11C11/4094 ,  G11C7/00

CPC分类号： G11C8/08 ,  G11C11/4094 ,  G11C5/145 ,  G11C5/147 ,  G11C7/12

摘要： An equalizing circuit is connected between a pair of bit lines. The equalizing circuit is made up of three MOS transistors and an equalization control signal is supplied to the gates of the MOS transistors. A sense amplifier circuit is connected to the bit lines. The sense amplifier circuit amplifies the potential difference occurring between the bit lines, for the detection of data. The equalization control signal is output from a level conversion circuit. An internal boosted voltage-generating circuit constantly generates a boosted voltage which is higher than an externally-applied power supply voltage applied to a power supply terminal. The boosted voltage is applied to the level conversion circuit. The level conversion circuit converts an input control signal, whose high-level voltage is equal to, or lower than the externally-applied power supply voltage, into the boosted voltage, thereby generating the equalization control signal.

摘要翻译： 均衡电路连接在一对位线之间。 均衡电路由三个MOS晶体管组成，并且均衡控制信号被提供给MOS晶体管的栅极。 读出放大器电路连接到位线。 读出放大器电路放大位线之间出现的电位差，用于检测数据。 均衡控制信号从电平转换电路输出。 内部升压产生电路不断地产生比施加到电源端子的外部施加的电源电压高的升压电压。 升压电压被施加到电平转换电路。 电平转换电路将其高电平等于或低于外部施加电源电压的输入控制信号转换为升压电压，从而产生均衡控制信号。

公开(公告)号：USRE35065E

公开(公告)日：1995-10-17

申请号：US305940

申请日：1994-09-19

申请人： Takashi Ohsawa

发明人： Takashi Ohsawa

IPC分类号： G11C8/18 ,  G11C11/4076 ,  G11C7/00 ,  G11C11/413

CPC分类号： G11C8/18 ,  G11C11/4076

摘要： A control circuit for a dynamic memory device comprises first timer means for a delaying the Row Address Stroke (RAS) signal by a first delay time and supplying the delayed RAS signal to a row control circuit, and a second timer means for delaying the RAS signal by a second delay time and supplying this delayed RAS signal to a column control circuit.

摘要翻译： 一种用于动态存储器件的控制电路包括第一定时器装置，用于将行地址行程（＆amp; R＆amp; R）信号延迟第一延迟时间，并将延迟和上升＆R信号提供给行控制电路;以及第二定时器装置， ＆upbar＆R信号延迟第二个延迟时间，并将此延迟和上拉和R信号提供给列控制电路。

公开(公告)号：US5381373A

公开(公告)日：1995-01-10

申请号：US75313

申请日：1993-06-11

申请人： Takashi Ohsawa

发明人： Takashi Ohsawa

IPC分类号： G11C29/20 ,  G11C29/34 ,  G11C29/50 ,  G11C7/00

CPC分类号： G11C29/50 ,  G11C29/20 ,  G11C29/34 ,  G06F2201/88 ,  G11C11/401

摘要： A semiconductor memory device includes a circuit for generating a voltage stress mode signal on the basis of a predetermined signal used in a normal operation of a DRAM circuit, and a control circuit for receiving the test mode signal from the generating circuit and performing control such that, in an AC voltage stress test mode, upper bits, of an output signal from a refresh address counter, which are more significant than a specific bit are fixed at the same level, and lower bits less significant than the specific bit are subjected to a normal count operation and such that, in a DC voltage stress test mode, all the bits of an output signal from the refresh address counter are fixed at the same level so as to cause a word line driving circuit to simultaneously drive all the word lines. In setting a desired AC/DC voltage stress mode for a DRAM in a wafer state or a package state, no special voltage stress test pads are required, and the number of circuits other than the circuit required for the normal mode can be minimized, thereby reducing an increase in chip area. In addition, in the AC mode, any failure mode such as a decrease in breakdown voltage between adjacent word lines or adjacent bit lines can be simultaneously screened.

摘要翻译： 半导体存储器件包括：用于根据在DRAM电路的正常操作中使用的预定信号产生电压应力模式信号的电路;以及控制电路，用于接收来自发生电路的测试模式信号，并进行控制，使得 在交流电压应力测试模式下，来自刷新地址计数器的比特定位更重要的输出信号的高位固定在同一电平，并且比特定位更低有效位的低位被 正常计数操作，并且在直流电压应力测试模式中，来自刷新地址计数器的输出信号的所有位固定在相同电平，以使字线驱动电路同时驱动所有字线。 在晶片状态或封装状态下为DRAM设置所需的AC / DC电压应力模式时，不需要特殊的电压应力测试焊盘，并且可以使正常模式所需电路以外的电路数量最小化，由此 减少芯片面积的增加。 此外，在交流模式中，可以同时屏蔽诸如相邻字线或相邻位线之间的击穿电压降低的任何故障模式。

公开(公告)号：US5373472A

公开(公告)日：1994-12-13

申请号：US65363

申请日：1993-05-24

申请人： Takashi Ohsawa

发明人： Takashi Ohsawa

IPC分类号： G11C11/401 ,  G01R31/28 ,  G01R31/3185 ,  G11C29/00 ,  G11C29/14 ,  G11C29/46 ,  G11C29/50 ,  G11C7/00

CPC分类号： G11C29/50 ,  G11C29/46 ,  G11C11/401

摘要： A semiconductor memory apparatus of the present invention comprises a semiconductor memory circuit and a test mode control circuit, the test mode control circuit sets a source voltage to a second voltage, which is larger than a first voltage used at the time of the normal operation, and controls the semiconductor memory circuit to be set to a predetermined voltage stress test mode by inputting a combination clock signal of clock signals unused at the time of the normal operation.

摘要翻译： 本发明的半导体存储装置包括半导体存储电路和测试模式控制电路，测试模式控制电路将源极电压设定为大于正常工作时使用的第一电压的第二电压， 并且通过输入在正常操作时不使用的时钟信号的组合时钟信号来将半导体存储器电路设置为预定的电压应力测试模式。

公开(公告)号：US5031150A

公开(公告)日：1991-07-09

申请号：US393784

申请日：1989-08-15

申请人： Takashi Ohsawa

发明人： Takashi Ohsawa

IPC分类号： G11C8/18 ,  G11C11/4076

CPC分类号： G11C8/18 ,  G11C11/4076

摘要： A control circuit for a dynamic memory device comprises first timer means for delaying the Row Address Stroke (RAS) signal by a first delay time and supplying the delayed RAS signal to a row control circuit, and a second timer means for delaying the RAS signal by a second delay time and supplying this delayed RAS signal to a column control circuit.

摘要翻译： 一种用于动态存储装置的控制电路包括：第一定时装置，用于将行地址行程（＆amp; R＆amp; R）信号延迟第一延迟时间，并将延迟和上行＆R信号提供给行控制电路;以及第二计时装置， R信号延迟第二延迟时间，并将该延迟和上行＆R信号提供给列控制电路。

公开(公告)号：US4016100A

公开(公告)日：1977-04-05

申请号：US652212

申请日：1976-01-26

申请人： Akira Suzuki ,  Hiroshi Miura ,  Saburo Matsuda ,  Takashi Ohsawa

发明人： Akira Suzuki ,  Hiroshi Miura ,  Saburo Matsuda ,  Takashi Ohsawa

IPC分类号： A61K9/107 ,  A61K9/127 ,  B01J13/02 ,  A61K9/52

CPC分类号： A61K9/1278 ,  A61K9/1277 ,  Y10T428/2984

摘要： A pharmaceutical composition is prepared by the steps of dispersing a phospholipid uniformly in water to give an aqueous phospholipid dispersion, adding a medicament to the aqueous dispersion, freezing the thus-obtained aqueous dispersion, thereby entrapping the medicament in the lipid spherules, and then thawing the frozen dispersion to give an aqueous suspension of the medicament entrapped in the lipid spherules having a diameter of less than 5.0 .mu.. The pharmaceutical composition prepared above is used as a controlled release pharmaceutical preparation.

摘要翻译： 通过以下步骤制备药物组合物：将磷脂均匀地分散在水中，得到磷脂水分散体，向水分散体中加入药物，冷冻由此得到的水分散体，从而将药物截留在脂质球中，然后解冻 冷冻分散体，得到截留在直径小于5.0μm的脂质球的药物的水性悬浮液。 将上述制备的药物组合物用作控释药物制剂。

公开(公告)号：US09013105B2

公开(公告)日：2015-04-21

申请号：US13378871

申请日：2009-09-10

申请人： Susumu Ohkura ,  Takashi Ohsawa

发明人： Susumu Ohkura ,  Takashi Ohsawa

IPC分类号： B60Q1/02 ,  B60Q11/00 ,  H05B33/08

CPC分类号： B60Q11/005 ,  H05B33/0884

摘要： Right and left lighting devices 3-1 and 3-2 each include an abnormal event informing signal output circuit for outputting an abnormal event informing signal in response to an informing output of the control circuits 6-1 and 6-2. Each abnormal event informing signal output circuit has a circuit configuration that enables the abnormal event informing signal to be supplied to onboard equipment via a signal path common to the two devices.

摘要翻译： 左右照明装置3-1和3-2各自包括用于响应于控制电路6-1和6-2的通知输出而输出异常事件通知信号的异常事件通知信号输出电路。 每个异常事件通知信号输出电路都具有使异常事件通知信号经由两个设备共用的信号路径提供给车载设备的电路配置。

公开(公告)号：US08823288B2

公开(公告)日：2014-09-02

申请号：US12999043

申请日：2009-07-08

申请人： Takashi Ohsawa

发明人： Takashi Ohsawa

IPC分类号： G05F1/00

CPC分类号： H05B41/2887 ,  Y02B20/202

摘要： A discharge lamp ballast apparatus includes an F/F 10 for maintaining the on or off operation of a high-side switching device Q1 of an inverter in synchronization with a rising edge and falling edge of a main signal, and a return unit 9 for generating a signal for returning, even if the output Q of the F/F is inverted owing an unforeseen situation, the output to the polarity to be output normally; and returns the output of the F/F 10 to the first polarity to be output normally using the return signal.

摘要翻译： 一种放电灯镇流器装置，包括用于与主信号的上升沿和下降沿同步地保持逆变器的高侧开关器件Q1的导通或截止操作的F / F 10，以及用于产生 即使F / F的输出Q由于不可预见的情况而反转，也能够正常输出极性的输出，返回信号。 并将F / F10的输出返回到第一极性，以使用返回信号正常地输出。

公开(公告)号：US20140001969A1

公开(公告)日：2014-01-02

申请号：US14004876

申请日：2011-08-05

申请人： Norikazu Tateishi ,  Takashi Ohsawa

发明人： Norikazu Tateishi ,  Takashi Ohsawa

IPC分类号： H05B33/08

CPC分类号： H05B33/0815 ,  H05B33/0809 ,  H05B33/0821 ,  H05B33/0827 ,  H05B33/083

摘要： An LED lighting device 1 lights LED blocks 4a and 4b which correspond to a plurality of functions of an illuminator such as headlights and are connected in series. The LED blocks 4a and 4b are connected in series with a current converting unit 5. While the LED blocks 4a and 4b are supplied with a current Ia from a single DC/DC converter unit 3, the LED block 4b is supplied with a current Ib that passes through conversion by the current converting unit 5 and that differs from the current Ia the DC/DC converter unit 3 outputs. Thus, the LED blocks 4a and 4b are each lit with appropriate brightness.

摘要翻译： LED照明装置1照亮与块灯等照明装置的多个功能对应的LED块4a，4b，并串联连接。 LED块4a和4b与电流转换单元5串联连接。当LED块4a和4b从单个DC / DC转换器单元3被提供有电流Ia时，向LED块4b提供电流Ib 其通过当前转换单元5的转换，并且与DC / DC转换器单元3输出的电流Ia不同。 因此，LED块4a和4b分别以适当的亮度点亮。

公开(公告)号：US08536790B2

公开(公告)日：2013-09-17

申请号：US13119446

申请日：2009-09-18

申请人： Yu Inoue ,  Takashi Ohsawa

发明人： Yu Inoue ,  Takashi Ohsawa

IPC分类号： H05B37/02

CPC分类号： H05B33/0815

摘要： When a current which is conducted from a direct current power supply 8 to a choke coil L1 after a switching transistor 7 is turned on has a predetermined value, an LED lighting device. lights up an LED series circuit by conducting a pulse-shaped current which occurs by turning off the switching transistor 7 to the LED series circuit. A cycle period at which the pulse-shaped current is generated is determined according to the average value of the current flowing through the LED series circuit by using an oscillator (VCO) 4. The LED lighting device controls each of the pulse-shaped current value and the average current value arbitrarily.

摘要翻译： 在开关晶体管7导通之后，从直流电源8向扼流线圈L1导通的电流为LED照明装置。 通过将开关晶体管7截止到LED串联电路而发生的脉冲电流来点亮LED串联电路。 根据通过使用振荡器（VCO）4流过LED串联电路的电流的平均值来确定产生脉冲形电流的周期。LED照明装置控制每个脉冲形电流值 和平均电流值。