INTERNAL NEGATIVE VOLTAGE GENERATION DEVICE
    91.
    发明申请
    INTERNAL NEGATIVE VOLTAGE GENERATION DEVICE 有权
    内部负电压发电装置

    公开(公告)号:US20120154024A1

    公开(公告)日:2012-06-21

    申请号:US13409379

    申请日:2012-03-01

    申请人: Chang-Ho Do

    发明人: Chang-Ho Do

    IPC分类号: G05F1/10

    摘要: An internal negative voltage generation device includes a first internal negative voltage generation block configured to generate a first internal negative voltage which is lower than a ground voltage; a second internal negative voltage generation block configured to generate a second internal negative voltage according to the first internal negative voltage, the second internal negative voltage being higher than the first internal negative voltage and lower than the ground voltage; and an initial driving block configured to additionally drive a second internal negative voltage terminal to the first internal negative voltage during an initial set time interval of an active operation time interval.

    摘要翻译: 内部负电压产生装置包括:第一内部负电压产生模块,被配置为产生低于接地电压的第一内部负电压; 第二内部负电压产生块,被配置为根据所述第一内部负电压产生第二内部负电压,所述第二内部负电压高于所述第一内部负电压并且低于所述接地电压; 以及初始驱动块,被配置为在活动操作时间间隔的初始设置时间间隔期间附加地将第二内部负电压端子驱动到所述第一内部负电压。

    Internal voltage supplying device
    92.
    发明授权
    Internal voltage supplying device 失效
    内部供电装置

    公开(公告)号:US08183912B2

    公开(公告)日:2012-05-22

    申请号:US12875018

    申请日:2010-09-02

    申请人: Chang-Ho Do

    发明人: Chang-Ho Do

    IPC分类号: H03K3/01

    CPC分类号: G11C5/145 G11C5/143

    摘要: An internal voltage supplying device. A reference voltage generator generates a first feedback voltage having a predetermined voltage ratio with respect to a core voltage. An adjusting mechanism adjusts the voltage ratio, and a voltage generator supplies a high voltage having a level higher than a level of the core voltage by the level of a threshold voltage or higher and maintains the level of the high voltage in accordance with the first feedback voltage.

    摘要翻译: 内部电压供给装置。 参考电压发生器产生相对于核心电压具有预定电压比的第一反馈电压。 调整机构调节电压比,并且电压发生器将具有高于核心电压电平的电平的高电压提供阈值电压或更高的电平,并根据第一反馈维持高电平的电平 电压。

    Word line driving circuit, semiconductor memory device including the same, and method for testing the semiconductor memory device
    93.
    发明授权
    Word line driving circuit, semiconductor memory device including the same, and method for testing the semiconductor memory device 有权
    字线驱动电路,包括其的半导体存储器件以及半导体存储器件的测试方法

    公开(公告)号:US08045394B2

    公开(公告)日:2011-10-25

    申请号:US12003546

    申请日:2007-12-28

    申请人: Chang-Ho Do

    发明人: Chang-Ho Do

    IPC分类号: G11C11/34

    摘要: A semiconductor memory device in accordance with the present invention is able to facilitate detecting whether a word line fails or not by floating the word line. The semiconductor memory device includes a word line driver, and a floating controller. The word line driver is configured to control a word line to be enabled/disabled. The floating controller is configured to control the word line driver to float the word line in response to a word line floating signal.

    摘要翻译: 根据本发明的半导体存储器件能够通过浮动字线来便于检测字线是否失败。 半导体存储器件包括字线驱动器和浮动控制器。 字线驱动器被配置为控制字线被启用/禁用。 浮动控制器被配置为控制字线驱动器以响应于字线浮动信号来浮动字线。

    High voltage generator and word line driving high voltage generator of memory device
    94.
    发明授权
    High voltage generator and word line driving high voltage generator of memory device 有权
    高压发生器和字线驱动高压发生器的存储器件

    公开(公告)号:US08035441B2

    公开(公告)日:2011-10-11

    申请号:US12724711

    申请日:2010-03-16

    IPC分类号: G05F1/10

    摘要: A high voltage generator includes: a detection unit for comparing a reference voltage with a high voltage and detecting a voltage level of the high voltage; an oscillator selection unit for generating a first control signal and a second control signal in response to an output signal of the detection unit and a selection signal corresponding to a data operation mode; an oscillator for generating clock signals having different frequencies in response to the first control signal and the second control signal; and a pumping unit for generating the high voltage by performing a charge pumping operation in response to the clock signals.

    摘要翻译: 高电压发生器包括:用于将参考电压与高电压进行比较并检测高电压电平的检测单元; 振荡器选择单元,用于响应于所述检测单元的输出信号和对应于数据操作模式的选择信号产生第一控制信号和第二控制信号; 用于响应于所述第一控制信号和所述第二控制信号产生具有不同频率的时钟信号的振荡器; 以及用于通过响应于时钟信号执行电荷泵送操作来产生高电压的泵送单元。

    Apparatus and method for testing semiconductor memory device
    95.
    发明授权
    Apparatus and method for testing semiconductor memory device 有权
    半导体存储器件测试装置及方法

    公开(公告)号:US08024628B2

    公开(公告)日:2011-09-20

    申请号:US12546600

    申请日:2009-08-24

    申请人: Chang-Ho Do

    发明人: Chang-Ho Do

    IPC分类号: G11C29/00 G11C7/00

    摘要: A semiconductor memory device for performing a reliability test includes a write driving block for generating a predetermined test voltage in a test mode and delivering a data inputted from an external circuit into the local I/O line pair during a data access operation in a normal mode, a local I/O line pair coupled to the write driving block for receiving the predetermined test voltage in the test mode, and a cell array having a plurality of unit cells and a plurality of bit line pairs respectively having first and second bit lines and coupled to at least one unit cell for receiving the predetermined test voltage from each local I/O line pair to thereby check a result of the reliability test in the test mode.

    摘要翻译: 用于执行可靠性测试的半导体存储器件包括写入驱动块,用于在测试模式中产生预定的测试电压,并且在正常模式下的数据访问操作期间将从外部电路输入的数据传送到本地I / O线对 耦合到写入驱动块的本地I / O线对,用于在测试模式中接收预定测试电压;以及单元阵列,其具有分别具有第一和第二位线的多个单位单元和多个位线对,以及 耦合到至少一个单元电池,用于从每个本地I / O线对接收预定的测试电压,从而在测试模式下检查可靠性测试的结果。

    FUSE CIRCUIT AND SEMICONDUCTOR DEVICE HAVING THE SAME
    96.
    发明申请
    FUSE CIRCUIT AND SEMICONDUCTOR DEVICE HAVING THE SAME 有权
    保险丝电路和具有相同功能的半导体器件

    公开(公告)号:US20100277999A1

    公开(公告)日:2010-11-04

    申请号:US12495015

    申请日:2009-06-30

    申请人: Chang-Ho Do

    发明人: Chang-Ho Do

    IPC分类号: G11C7/02 G11C17/18

    CPC分类号: G11C17/14 G11C7/02 G11C29/785

    摘要: A fuse circuit includes a fuse unit configured to drive an output terminal via a current path including a fuse in response to a fuse enable signal; and a comparison unit configured to be activated in response to an activation signal for comparing a reference voltage having a predetermined level with a voltage level of the output terminal to generate a fuse state signal.

    摘要翻译: 保险丝电路包括:熔丝单元,配置成响应于熔丝使能信号经由包括熔丝的电流路径来驱动输出端; 以及比较单元,被配置为响应于用于将具有预定电平的参考电压与所述输出端子的电压电平进行比较的激活信号而被激活,以产生熔丝状态信号。

    Semiconductor device
    97.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号:US07764106B2

    公开(公告)日:2010-07-27

    申请号:US11647350

    申请日:2006-12-29

    申请人: Chang-Ho Do

    发明人: Chang-Ho Do

    IPC分类号: H03L5/00

    摘要: A semiconductor device is capable of stably maintaining a voltage level of a shield line, even when a voltage level of an adjacent line is varied. The semiconductor device includes normal lines arranged for transfer of signals, a shield line arranged adjacently to the normal lines, a level shifting circuit for receiving an input signal swinging between a power supply voltage level and a ground voltage level, and shifting the input signal to an output signal swing between the power supply voltage level and a low voltage level lower than the ground voltage level by a predetermined level to output a shifted signal via the shield line, and a signal input unit for transferring the signal provided via the shield line to an output node.

    摘要翻译: 即使当相邻线的电压电平发生变化时,半导体器件能够稳定地保持屏蔽线的电压电平。 半导体器件包括用于传输信号的法线,与法线相邻布置的屏蔽线;电平移位电路,用于接收在电源电压电平和接地电压电平之间摆动的输入信号,并将输入信号移位到 输出信号在电源电压电平和低于接地电压电平的低电压电平之间摆动预定电平,以经由屏蔽线输出移位信号;以及信号输入单元,用于将经由屏蔽线提供的信号传送到 输出节点。

    SEMICONDUCTOR MEMORY DEVICE
    98.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权
    半导体存储器件

    公开(公告)号:US20100110811A1

    公开(公告)日:2010-05-06

    申请号:US12344091

    申请日:2008-12-24

    IPC分类号: G11C29/00 G11C7/10

    摘要: A semiconductor memory device includes a first data input circuit configured to align data inputted to a first data pad in parallel for transferring the aligned data to a first global bus and for transferring the aligned data to a second global bus in a test mode; and a second data input circuit configured to align data inputted to a second data pad in parallel for transferring the aligned data to the second global bus and to not receive data in the test mode.

    摘要翻译: 半导体存储器件包括第一数据输入电路,其被配置为并行地对准输入到第一数据焊盘的数据,以将对准的数据传送到第一全局总线,并在测试模式中将对准的数据传送到第二全局总线; 以及第二数据输入电路,被配置为并行地对输入到第二数据焊盘的数据进行对准,以将对准的数据传送到第二全局总线,并且在测试模式中不接收数据。

    High voltage generator and word line driving high voltage generator of memory device
    99.
    发明授权
    High voltage generator and word line driving high voltage generator of memory device 有权
    高压发生器和字线驱动高压发生器的存储器件

    公开(公告)号:US07710193B2

    公开(公告)日:2010-05-04

    申请号:US11528282

    申请日:2006-09-28

    IPC分类号: G05F3/02

    摘要: A high voltage generator includes: a detection unit for comparing a reference voltage with a high voltage and detecting a voltage level of the high voltage; an oscillator selection unit for generating a first control signal and a second control signal in response to an output signal of the detection unit and a selection signal corresponding to a data operation mode; an oscillator for generating clock signals having different frequencies in response to the first control signal and the second control signal; and a pumping unit for generating the high voltage by performing a charge pumping operation in response to the clock signals.

    摘要翻译: 高电压发生器包括:用于将参考电压与高电压进行比较并检测高电压电平的检测单元; 振荡器选择单元,用于响应于所述检测单元的输出信号和对应于数据操作模式的选择信号产生第一控制信号和第二控制信号; 用于响应于所述第一控制信号和所述第二控制信号产生具有不同频率的时钟信号的振荡器; 以及用于通过响应于时钟信号执行电荷泵送操作来产生高电压的泵送单元。

    Semiconductor memory device including reset control circuit
    100.
    发明授权
    Semiconductor memory device including reset control circuit 失效
    半导体存储器件包括复位控制电路

    公开(公告)号:US07701790B2

    公开(公告)日:2010-04-20

    申请号:US11528642

    申请日:2006-09-28

    IPC分类号: G11C7/00

    摘要: A semiconductor memory device for use in a system includes a reset signal generator for generating a reset entry signal and a reset exit signal respectively in response to a start timing and a termination timing of a reset operation of the system; and a reset controller for performing a precharge operation in response to the reset entry signal and a refresh operation in response to the reset exit signal.

    摘要翻译: 一种在系统中使用的半导体存储器件包括:复位信号发生器,用于响应于系统的复位操作的开始定时和终止定时,分别产生复位输入信号和复位输出信号; 以及复位控制器,用于响应于复位输入信号和响应于复位退出信号的刷新操作执行预充电操作。