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91.发明授权Calibration method for redundant A/D and D/A converters with a weighted network 失效具有加权网络的冗余A / D和D / A转换器的校准方法
公开(公告)号：US4970514A
公开(公告)日：1990-11-13
申请号：US284300
申请日：1988-12-14
申请人： Dieter Draxelmayr
发明人： Dieter Draxelmayr
CPC分类号： H03M1/1042 , H03M1/1047 , H03M1/468
摘要： A calibration method for redundant A/D and D/A converters with a weighted network and error correction includes performing a self-calibration in which each of n weighted elements is determined as a function of respectively lower weighted elements by means of a measurement with n steps, except for a lowest weighted element. Subsequently each weighted element is calculated and stored in memory in terms of the sum of all of the weighted elements as a function of the results of the measurement with the aid of a calculating register.
摘要翻译： 具有加权网络和纠错的冗余A / D和D / A转换器的校准方法包括执行自校准，其中n个加权元素中的每一个被确定为分别较低加权元素的函数，借助于具有n 步骤，除了最低加权元素。 随后，借助于计算寄存器，每个加权元素被计算并存储在所有加权元素的总和中，作为测量结果的函数。
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公开(公告)号：US4922252A
公开(公告)日：1990-05-01
申请号：US91537
申请日：1987-08-31
CPC分类号： H03M1/1023 , H03M1/0682 , H03M1/468
摘要： An analog/digital converter operating on the principle of charge distribution includes a capacitor network having dual-weighted capacitors including two smallest capacitors. The capacitors each have two terminals. A comparator has a first input connected to one of the terminals of each of the capacitors and a second input and a reference switch is connected between each of the one terminals and a first reference potential. Other switches each selectively connect the other of the terminals of a respective one of the capacitors to an input analog potential, the first reference potential and a second reference potential. A coupling capacitor is connected upstream of the first input of the comparator.
摘要翻译： 以电荷分布为原则的模拟/数字转换器包括具有包括两个最小电容器的双重加权电容器的电容器网络。 电容器各有两个端子。 比较器具有连接到每个电容器的一个端子的第一输入端，第二输入端和参考开关连接在每个一个端子和第一参考电位之间。 其他开关各自选择性地将电容器的相应一个的端子中的另一个连接到输入模拟电位，第一参考电位和第二参考电位。 耦合电容器连接在比较器的第一输入端的上游。
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公开(公告)号：US4875018A
公开(公告)日：1989-10-17
申请号：US099104
申请日：1987-09-18
申请人： Dieter Draxelmayr
发明人： Dieter Draxelmayr
摘要： A current mirror circuit assembly includes a first current mirror circuit formed of an input transistor connected as a diode and a mirror transistor. The input transistor and the mirror transistor have gate terminals connected to one another and output circuits with output terminals. One of the output terminals of each of the input transistor and the mirror transistor are connected to a supply potential. A regulating transistor has an output circuit connected in series with the output circuit of the mirror transistor. A second current mirror circuit is formed of transistors with output circuits. Other transistors are controlled by the other of the output terminals of a respective one of the input transistor and the mirror transistor. One of the other transistors is fed back to the regulating transistor and the other transistors are connected to the output circuits of the transistors of the second current mirror circuit.
摘要翻译： 电流镜电路组件包括由连接为二极管的输入晶体管和反射镜晶体管形成的第一电流镜电路。 输入晶体管和反射镜晶体管具有彼此连接的栅极端子和具有输出端子的输出电路。 输入晶体管和反射镜晶体管中的每一个的输出端之一连接到电源。 调节晶体管具有与镜面晶体管的输出电路串联连接的输出电路。 第二电流镜电路由具有输出电路的晶体管形成。 其他晶体管由输入晶体管和反射镜晶体管中的相应一个的输出端子中的另一个控制。 其他晶体管中的一个被反馈到调节晶体管，并且其它晶体管连接到第二电流镜电路的晶体管的输出电路。
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公开(公告)号：US4852130A
公开(公告)日：1989-07-25
申请号：US91538
申请日：1987-08-31
申请人： Dieter Draxelmayr
发明人： Dieter Draxelmayr
CPC分类号： H03M1/462
摘要： A successive approximation register for an analog/digital converter operating according to the weighing method and having a bit width n includes a comparator and n memory elements each having one data input and one data output for shifting onward a logical "1" potential for each successive weighing step as well as for writing-in and storing in memory the particular result of weighing ascertained by the comparator. Multiplexers are associated with the n memory elements and have data input sides partially connected to the comparator. Logic elements are connected between the data outputs of the memory elements and the multiplexers for respectively controlling the data input sides of the multiplexers.
摘要翻译： 用于根据称重方法操作且具有位宽度n的模拟/数字转换器的逐次逼近寄存器包括比较器和n个存储器元件，每个存储器元件具有一个数据输入端和一个数据输出端，用于每个连续的向上移动逻辑“1”电位 称重步骤以及用于写入和存储记录中由比较器确定的称重的特定结果。 多路复用器与n个存储器元件相关联，并且数据输入侧部分地连接到比较器。 逻辑元件连接在存储元件的数据输出端和多路复用器之间，用于分别控制多路复用器的数据输入端。
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公开(公告)号：US4758801A
公开(公告)日：1988-07-19
申请号：US882583
申请日：1986-07-07
申请人： Dieter Draxelmayr
发明人： Dieter Draxelmayr
CPC分类号： H03L7/107 , H03L7/099 , H03L2207/06
摘要： A dynamic control system includes at least one control loop which contains a comparator, a correction device and an adjusting device with a control device wherein a controlled variable is determined and compared with a reference variable for forming a control difference, the correction and the adjusting device operating to provide a given characteristic, a controlled variable being derived by the adjusting device cooperating with a control variable derived from the control device as the output variable wherein the control loop can be coupled to at least one further control loop and/or variable of the dynamic control system, wherein the further control loop includes an adjusting device and wherein the control device contains at least two functional groups having different characteristics, of which at least one is intermittently connected in the signal path of the control difference for generating the controlled variable and a method for operating the dynamic control system.
摘要翻译： 动态控制系统包括至少一个控制回路，其包含比较器，校正装置和具有控制装置的调节装置，其中确定控制变量并将其与用于形成控制差的参考变量进行比较，校正和调整装置 操作以提供给定的特性，由所述调节装置导出的受控变量与从所述控制装置导出的控制变量一起作为所述输出变量，其中所述控制回路可以耦合到所述控制回路的至少一个另外的控制回路和/ 动态控制系统，其中所述另外的控制回路包括调整装置，并且其中所述控制装置包含具有不同特性的至少两个功能组，其中至少一个在所述控制差异的信号路径中间歇地连接以产生所述受控变量，以及 一种操作动态控制系统的方法。
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