摘要:
A receiver may be operable to receive an inter-symbol correlated (ISC) signal, and generate a plurality of soft decisions as to information carried in the ISC signal. The soft decisions may be generated using a reduced-state sequence estimation (RSSE) process. The RSSE process may be such that the number of symbol survivors retained after each iteration of the RSSE process is less than the maximum likelihood state space. The plurality of soft decisions may comprise a plurality of log likelihood ratios (LLRs). Each of the plurality of LLRs may correspond to a respective one of a plurality of subwords of a forward error correction (FEC) codeword.
摘要:
A transmitter may be operable to generate a sequence of symbols which may comprise information symbols and one or more pilot symbols. The transmitter may transmit the information symbols at a first power and transmit the one or more pilot symbols at a second power. In instances when a particular performance indicator is below a determined threshold, the first power may be set to a first value and the second power may be set to zero value. In instances when the particular performance indicator is above the determined threshold, the first power may be set to a second value and the second power may be set to a non-zero value. A value of the first power and a value of the second power may be based on an applicable average power limit determined by a communications standard with which the transmitter is to comply.
摘要:
One or more embodiments describe a decision feedback equalizer for highly spectrally efficient communications. A method may be performed in a decision feedback equalizer (DFE). The method may include initializing values of tap coefficients of the DFE based on values of tap coefficients of a partial response filter through which said transmitted symbols passed en route to said sequence estimation circuit. The method may include receiving estimates of transmitted symbols from a sequence estimation circuit, and receiving an error signal that is generated based on an estimated partial response signal output by the sequence estimation circuit. The method may include updating values of tap coefficients of the DFE based on the error signal and the estimates of transmitted symbols. The method may include generating one or more constraints that restrict the impact of the error signal on the updating of the values of the tap coefficients of the DFE.
摘要:
A receiver may be operable to receive a QAM-based, inter-symbol correlated (ISC) signal having pilot overhead of 5% at a signal-to-noise ratio (SNR). The receiver may be operable to process the QAM-based, ISC signal to output information at a particular rate with a symbol error rate lower than or equal to 1e−2. The first SNR may be at least 3 dB below a SNR required to achieve the same particular information rate and the same symbol error rate while processing a signal having zero inter-symbol interference.
摘要:
A receiver may be dynamically configurable, during run-time, into a plurality of modes of operation. In a first mode of operation the receiver may demodulate received signals having relative low inter-symbol correlation using a near zero ISI filter and symbol slicing. In a second mode of operation the receiver may demodulate received signals having relatively high inter-symbol correlation using an input filter configured to achieve a desired total partial response and a sequence estimation algorithm.
摘要:
A transmitter may comprise a symbol mapping circuit that is configurable to operate in at least two configurations, wherein a first of the configurations of the symbol mapping circuit uses a first symbol constellation and a second of the configurations of the symbol mapping circuit uses a second symbol constellation. The transmitter may also comprise a pulse shaping circuit that is configurable to operate in at least two configurations, wherein a first of the configurations of the pulse shaping circuit uses a first set of filter taps and a second of the configurations of the pulse shaping circuit uses a second set of filter taps. The first set of filter taps may correspond to a root raised cosine (RRC) filter and the second set of filter taps corresponds to a partial response filter.
摘要:
Circuitry for use in a receiver may comprise: a front-end circuit operable to receive an orthogonal frequency division multiplexing (OFDM) symbol on a first number of physical subcarriers. The circuitry may comprise a decoding circuit operable to decode the OFDM symbol using an inter-carrier interference (ICI) model, the decoding resulting in a determination of a sequence of symbols, comprising a second number of symbols, that most-likely correspond to the received OFDM symbol, where the second number is greater than the first number. The sequence of symbols may comprise N-QAM symbols, N being an integer. The ISCI model may be based, at least in part, on non-linearity experienced by the OFDM symbol during transmission by a transmitter, propagation over a channel, and/or reception by the receiver. The ISCI model may be based, at least in part, on phase-noise introduced to the OFDM symbol during transmission by a transmitter, propagation over a channel, and/or reception by the receiver.
摘要:
A method and system for a sequence estimation in a receiver, such as for use when receiving a sample of a received inter-symbol correlated (ISC) signal corresponding to a transmitted vector of L symbols, with L being a integer greater than 1, and with symbol L being a most-recent symbol and symbol 1 being least recent symbol of the vector. A plurality of candidate vectors may be generated, wherein element L-m of each candidate vector holding one of a plurality of possible values of the symbol L-m, with m is an integer greater than or equal to 1, and elements L-m+1 through L of each candidate vectors holding determined filler values. A plurality of metrics may be generated based on the plurality of candidate vectors, and based on the generated plurality of metrics, a best one of the possible values of the symbol L-m may be selected.
摘要:
A system may comprise circuitry that includes a sequence estimation circuit and a non-linearity modeling circuit. The circuitry may be operable to receive a single-carrier signal that was generated by passage of symbols through a partial response filter and through a non-linear circuit. The circuitry may be operable to generate estimated values of the symbols using the sequence estimation circuit and using the non-linearity modeling circuit. An output of the non-linearity modeling circuit may be equal to a corresponding input of the non-linearity modeling circuit modified according to a non-linear model that approximates the non-linearity of the non-linear circuit through which the received signal passed.
摘要:
For corrupt symbol handling for providing high reliability sequences, an inter-symbol correlated (ISC) signal is received. During sequence estimation when demodulating the received ISC signal, partial response samples in the ISC may be processed utilizing an erasure mechanism. The partial response samples are spread (e.g. interleaved) over time during modulation by a modulator. A determination is made as to whether to utilize self erasure or external erasure to process the spread partial response samples. The determination may be based on whether or not events of low SNR for corresponding ones of the partial response samples are identified. The external erasure may be utilized for processing the corresponding ones of the partial response samples when the events of low SNR are identified and the self erasure is utilized when the events of low SNR are not identifiable. Erasure results maybe fed back to the modulator.