公开(公告)号：US5731796A

公开(公告)日：1998-03-24

申请号：US135357

申请日：1993-10-13

申请人： Tsutomu Furuhashi ,  Makiko Ikeda ,  Naruhiko Kasai ,  Toshio Futami ,  Tetsuya Suzuki

发明人： Tsutomu Furuhashi ,  Makiko Ikeda ,  Naruhiko Kasai ,  Toshio Futami ,  Tetsuya Suzuki

IPC分类号： G09G3/20 ,  G09G3/36

CPC分类号： G09G3/2011 ,  G09G3/3614 ,  G09G3/3648 ,  G09G3/3659 ,  G09G3/3688 ,  G09G2300/0842 ,  G09G2300/0876 ,  G09G2310/0251 ,  G09G2310/027 ,  G09G2310/0281 ,  G09G2310/0289 ,  G09G3/3655

摘要： A method for driving a liquid crystal (LCD) display apparatus. The LCD display apparatus includes a liquid crystal panel arranged by a plurality of pixel units formed in a matrix shape, and a signal drive circuit for generating a liquid crystal apply voltage and constructed of at least two integrated circuits. A DC common electrode voltage is applied to one electrode of liquid crystal of the pixel units within the liquid crystal panel, and an AC voltage is applied to the liquid crystal to be driven.

摘要翻译： 一种用于驱动液晶（LCD）显示装置的方法。 LCD显示装置包括由矩阵形状的多个像素单元布置的液晶面板和用于产生液晶施加电压并由至少两个集成电路构成的信号驱动电路。 将DC公共电极电压施加到液晶面板内的像素单元的液晶的一个电极，并将AC电压施加到待驱动的液晶。

公开(公告)号：US08339390B2

公开(公告)日：2012-12-25

申请号：US12625683

申请日：2009-11-25

申请人： Naoki Takada ,  Naruhiko Kasai ,  Takuya Eriguchi ,  Yuki Okada ,  Mitsuru Goto ,  Yoshihiro Kotani

发明人： Naoki Takada ,  Naruhiko Kasai ,  Takuya Eriguchi ,  Yuki Okada ,  Mitsuru Goto ,  Yoshihiro Kotani

IPC分类号： G06F3/038

CPC分类号： G09G3/3696 ,  G09G2330/02 ,  G09G2330/021 ,  H02M3/07 ,  H02M3/156 ,  H02M2001/0032 ,  Y02B70/16

摘要： Provided are a power supply circuit and a display device which are capable of enhancing power efficiency even when applied to a display panel whose current consumption varies. The power supply circuit boosts and outputs an input voltage using a booster chopper circuit. A frequency control circuit changes a frequency of a clock signal, which controls a switch of the chopper circuit, in accordance with a load of the power supply circuit. The frequency control circuit divides an operation of the display device into a display effective period at a high load and a vertical retrace period at a low load, based on a vertical synchronizing signal and a horizontal synchronizing signal. The frequency control circuit sets the frequency of the clock signal in a high-load period to be higher than that in a low-load period.

摘要翻译： 提供了即使在电流消耗变化的显示面板上也能够提高功率效率的电源电路和显示装置。 电源电路使用升压斩波电路来提升输出电压。 频率控制电路根据电源电路的负载改变控制斩波电路的开关的时钟信号的频率。 频率控制电路基于垂直同步信号和水平同步信号，在低负载下将显示装置的操作划分为高负载和垂直回扫周期的显示有效期间。 频率控制电路将高负载时段的时钟信号的频率设定为比低负载期间的频率高。

公开(公告)号：US08280190B2

公开(公告)日：2012-10-02

申请号：US12180909

申请日：2008-07-28

申请人： Koji Nagata ,  Naruhiko Kasai ,  Yasuyuki Kudo ,  Junichi Maruyama ,  Masahiro Kageyama ,  Shigeki Nagaya

发明人： Koji Nagata ,  Naruhiko Kasai ,  Yasuyuki Kudo ,  Junichi Maruyama ,  Masahiro Kageyama ,  Shigeki Nagaya

IPC分类号： G06K9/32 ,  H04N5/228 ,  G09G5/00 ,  G06K15/02

CPC分类号： G09G3/20 ,  G09G3/2025 ,  G09G3/32 ,  G09G3/3648 ,  G09G2320/0261 ,  G09G2360/16

摘要： To provide a processing method for reducing motion blur while increasing resolution. By performing a super-resolution process, a resolution-increased image is obtained from an input image in multiple frames. By performing an enlargement process, an enlarged image is obtained from the input image in one frame. A high-frequency image is obtained by subtracting the enlarged image from the resolution-increased image. A high spatial frequency-emphasized image is obtained by adding the high-frequency image to the resolution-increased image. The enlarged image and high spatial frequency-emphasized image are displayed alternately every half frame.

摘要翻译： 提供用于减小运动模糊同时增加分辨率的处理方法。 通过执行超分辨率处理，从多帧的输入图像获得分辨率增加的图像。 通过进行放大处理，从一帧的输入图像获得放大图像。 通过从分辨率增加图像中减去放大图像获得高频图像。 通过将高频图像添加到分辨率增加的图像来获得高空间频率强调图像。 放大的图像和高空间频率强调图像每半帧交替显示。

公开(公告)号：US20110032231A1

公开(公告)日：2011-02-10

申请号：US12844923

申请日：2010-07-28

申请人： Junichi MARUYAMA ,  Koji Hosogi ,  Goki Toshima ,  Misa Owa ,  Naruhiko Kasai ,  Kikuo Ono

发明人： Junichi MARUYAMA ,  Koji Hosogi ,  Goki Toshima ,  Misa Owa ,  Naruhiko Kasai ,  Kikuo Ono

IPC分类号： G09G5/00

CPC分类号： G09G3/2096 ,  G09G3/3666 ,  G09G2310/0221 ,  G09G2310/04 ,  G09G2320/0247 ,  G09G2320/10 ,  G09G2330/021 ,  G09G2340/0435

摘要： A display device includes a frame frequency conversion circuit configured to convert a frame frequency of an input display data and a timing control circuit configured to control a first drive circuit and a second drive circuit based on a frame frequency after the conversion. The display device generates at least two display areas on the display panel. The at least two display areas display images at different frame frequencies. The display device further includes a switch unit configured to display an image at the frame frequency before the conversion at one of the at least two display areas and configured to display an image at the frame frequency after the conversion at another one of the at least two display areas. At least one of a boundary position and a size of the at least two display areas varies with time.

摘要翻译： 显示装置包括：帧频转换电路，被配置为转换输入显示数据的帧频;以及定时控制电路，被配置为基于转换后的帧频控制第一驱动电路和第二驱动电路。 显示装置在显示面板上产生至少两个显示区域。 至少两个显示区域以不同的帧频显示图像。 所述显示装置还包括：开关单元，被配置为在所述至少两个显示区域之一处的所述转换之前以帧频显示图像，并且被配置为在所述至少两个显示区域中的另一个上转换之后以帧频率显示图像 显示区域。 至少两个显示区域的边界位置和尺寸中的至少一个随着时间而变化。

公开(公告)号：US20100128022A1

公开(公告)日：2010-05-27

申请号：US12625683

申请日：2009-11-25

申请人： Naoki Takada ,  Naruhiko Kasai ,  Takuya Eriguchi ,  Yuki Okada ,  Mitsuru Goto ,  Yoshihiro Kotani

发明人： Naoki Takada ,  Naruhiko Kasai ,  Takuya Eriguchi ,  Yuki Okada ,  Mitsuru Goto ,  Yoshihiro Kotani

IPC分类号： G06F3/038

CPC分类号： G09G3/3696 ,  G09G2330/02 ,  G09G2330/021 ,  H02M3/07 ,  H02M3/156 ,  H02M2001/0032 ,  Y02B70/16

摘要： Provided are a power supply circuit and a display device which are capable of enhancing power efficiency even when applied to a display panel whose current consumption varies. The power supply circuit boosts and outputs an input voltage using a booster chopper circuit. A frequency control circuit changes a frequency of a clock signal, which controls a switch of the chopper circuit, in accordance with a load of the power supply circuit. The frequency control circuit divides an operation of the display device into a display effective period at a high load and a vertical retrace period at a low load, based on a vertical synchronizing signal and a horizontal synchronizing signal. The frequency control circuit sets the frequency of the clock signal in a high-load period to be higher than that in a low-load period.

摘要翻译： 提供了即使在电流消耗变化的显示面板上也能够提高功率效率的电源电路和显示装置。 电源电路使用升压斩波电路来提升输出电压。 频率控制电路根据电源电路的负载改变控制斩波电路的开关的时钟信号的频率。 频率控制电路基于垂直同步信号和水平同步信号，在低负载下将显示装置的操作划分为高负载和垂直回扫周期的显示有效期间。 频率控制电路将高负载时段的时钟信号的频率设定为比低负载期间的频率高。

公开(公告)号：US20080252223A1

公开(公告)日：2008-10-16

申请号：US12047337

申请日：2008-03-13

申请人： Hironori Toyoda ,  Naruhiko Kasai ,  Hajime Murakami

发明人： Hironori Toyoda ,  Naruhiko Kasai ,  Hajime Murakami

IPC分类号： G09G3/30

CPC分类号： G09G3/3225 ,  G09G3/3283 ,  G09G3/3291 ,  G09G2300/043 ,  G09G2320/029 ,  G09G2320/0295 ,  G09G2360/148

摘要： The present invention provides an organic EL display device with high detection accuracy which can enhance both of light emission efficiency and light reception efficiency. In an organic EL display device which includes organic thin film elements, a power source line is connected to the organic thin film elements via drive TFTs, a signal line is connected to a gate of the drive TFT to supply a potential corresponding to a gray scale signal, a switch is provided for connecting the signal line and the organic thin film element, and the switch is controlled to allow an electric current which is obtained by photoelectric conversion with the organic thin film element to flow in the signal line and the organic thin film element during a period in which a gray scale signal is not applied to the signal line.

摘要翻译： 本发明提供一种能够提高发光效率和光接收效率的检测精度高的有机EL显示装置。 在包括有机薄膜元件的有机EL显示装置中，电源线经由驱动TFT连接到有机薄膜元件，信号线连接到驱动TFT的栅极，以提供对应于灰度级的电位 信号，提供用于连接信号线和有机薄膜元件的开关，并且控制开关以允许通过用有机薄膜元件的光电转换获得的电流在信号线中流动，并且有机薄 在不对信号线施加灰度信号的期间中的膜元件。

公开(公告)号：US07202848B2

公开(公告)日：2007-04-10

申请号：US11407976

申请日：2006-04-21

申请人： Tsutomu Furuhashi ,  Takeshi Maeda ,  Atsuhiro Higa ,  Hisayuki Ohhara ,  Hiroshi Kurihara ,  Naruhiko Kasai

发明人： Tsutomu Furuhashi ,  Takeshi Maeda ,  Atsuhiro Higa ,  Hisayuki Ohhara ,  Hiroshi Kurihara ,  Naruhiko Kasai

IPC分类号： G09G3/36

CPC分类号： G09G5/005 ,  G09G3/3611 ,  G09G3/3685 ,  G09G3/3688 ,  G09G5/003 ,  G09G5/006 ,  G09G5/391 ,  G09G5/393 ,  G09G5/395 ,  G09G2310/0205 ,  G09G2310/027 ,  G09G2340/0407 ,  G09G2340/0414 ,  G09G2340/0421 ,  G09G2340/0435 ,  G09G2340/0471 ,  G09G2340/0478 ,  G09G2340/0485 ,  G09G2360/18

摘要： There is provided a liquid crystal display control device which can display pictures in a magnification mode by using only a memory having low-speed access and a low storage capacity. When a video signal has intermediate resolution or less, the enlargement processing is performed by a frame memory, a line memory and an enlargement processing control circuit. If the input operation and the output operation to and from the frame memory are synchronized with each other, it is sufficient for the frame memory to have a storage capacity of two lines. When the video signal has the same high resolution as a liquid crystal display panel, the video signal is output through a gate circuit to a display timing generating circuit, and it is displayed in a through mode. In this case, no processing is performed by the frame memory or the like.

摘要翻译： 提供一种液晶显示控制装置，其可以仅使用具有低速存取和低存储容量的存储器来以放大模式显示图像。 当视频信号具有中等分辨率或更小时，放大处理由帧存储器，行存储器和放大处理控制电路执行。 如果与帧存储器的输入操作和输出操作相互同步，则帧存储器具有两行的存储容量就足够了。 当视频信号具有与液晶显示面板相同的高分辨率时，视频信号通过门电路输出到显示定时产生电路，并以直通模式显示。 在这种情况下，帧存储器等不进行处理。

公开(公告)号：US20060092188A1

公开(公告)日：2006-05-04

申请号：US11255097

申请日：2005-10-21

申请人： Norio Mamba ,  Takashi Shoji ,  Naruhiko Kasai

发明人： Norio Mamba ,  Takashi Shoji ,  Naruhiko Kasai

IPC分类号： H04N5/262 ,  H04N5/50

CPC分类号： H04N9/641 ,  G09G3/3611 ,  G09G5/005 ,  G09G5/225 ,  G09G2340/0407 ,  G09G2340/0464 ,  G09G2340/125 ,  H04N5/44504 ,  H04N5/66 ,  H04N21/4307 ,  H04N21/4402

摘要： A display device having an on-screen display (OSD) function receives an YUV video signal such as the camera video signal or broadcast video signal of YUV format from a camera or recording medium, receives an RGB-OSD signal from a circuit device (serial interface) of another system different from this YUV video signal, causes a memory within an OSD processor to store the OSD signal, converts an RGB video signal resulting from converting the YUV video signal to a panel-matched RGB video signal synchronized with a display synchronization signal, reads a panel-matched RGB OSD signal from the memory of the OSD processor in synchronism with this display synchronization signal, composes those RGB video signal and OSD signal, using an OSD composer, and supplies the resulting RGB composite video signal and the display synchronization signal to a display panel.

摘要翻译： 具有屏幕显示（OSD）功能的显示装置从照相机或记录介质接收诸如照相机视频信号或YUV格式的广播视频信号的YUV视频信号，从电路装置接收RGB-OSD信号（串行 接口），使OSD处理器内的存储器存储OSD信号，将由YUV视频信号转换得到的RGB视频信号转换为与显示同步同步的面板匹配的RGB视频信号 信号，与OSD显示同步信号同步地从OSD处理器的存储器读取面板匹配的RGB OSD信号，使用OSD编辑器构成那些RGB视频信号和OSD信号，并且提供所得的RGB复合视频信号和显示器 同步信号到显示面板。

公开(公告)号：US06389180B1

公开(公告)日：2002-05-14

申请号：US09636059

申请日：2000-08-10

申请人： Shinji Wakisawa ,  Naruhiko Kasai ,  Hiroko Sato ,  Youichi Watanabe ,  Hiroyuki Koizumi

发明人： Shinji Wakisawa ,  Naruhiko Kasai ,  Hiroko Sato ,  Youichi Watanabe ,  Hiroyuki Koizumi

IPC分类号： G06K936

CPC分类号： G06T3/4007 ,  G09G3/20 ,  G09G5/00 ,  G09G5/26 ,  G09G5/391 ,  G09G2340/0407 ,  G09G2340/0414 ,  G09G2340/0421 ,  H04N5/14 ,  H04N7/01

摘要： There is disclosed a resolution conversion apparatus for converting an original digital image into a digital image having a different number of pixels in accordance with an instructed conversion magnification factor. In the apparatus, a determination circuit determines the number of pixels to be interpolated in each block of the original image and positions where they are interpolated in accordance with the conversion magnification factor. The block includes a predetermined number of pixels of the original image. A converted image generation circuit generates pixel data for the interpolation pixels at the positions where they are interpolated in accordance with a predetermined interpolation equation whose coefficients are determined with the positions and data values of the pixels in the block, and combines the pixel data for the digital original image and the generated pixel data to output a converted digital image. The interpolation equation includes spline functions and Bezier functions.

公开(公告)号：US06297816B1

公开(公告)日：2001-10-02

申请号：US09316959

申请日：1999-05-24

申请人： Shigeyuki Nishitani ,  Naruhiko Kasai ,  Hiroshi Kurihara ,  Tatsumi Mori ,  Yukio Hiruta ,  Masashi Mori

发明人： Shigeyuki Nishitani ,  Naruhiko Kasai ,  Hiroshi Kurihara ,  Tatsumi Mori ,  Yukio Hiruta ,  Masashi Mori

IPC分类号： G09G500

CPC分类号： G09G5/006 ,  G09G5/008 ,  G09G2320/06 ,  G09G2320/0606 ,  G09G2320/0673 ,  G09G2370/04

摘要： An object of the present invention is to perform precise A-D conversion of analog video signal in a liquid crystal display monitor, without increasing a transmission line: to attain this object, a horizontal dividing signal synthesizing circuit of a graphics card superposes a horizontal dividing signal synchronized in phase with a clock for D-A conversion of the analog video signal on a horizontal sync signal, to obtain a second horizontal sync signal, to be outputted; a sync signal isolating circuit of the liquid crystal display monitor isolates the horizontal dividing signal and horizontal sync signal from the second horizontal sync signal; the PLL generates an A-D conversion clock synchronized with the horizontal dividing signal.

摘要翻译： 本发明的目的是在不增加传输线的情况下在液晶显示监视器中进行模拟视频信号的精确的AD转换：为了达到此目的，图形卡的水平分割信号合成电路将水平分割信号叠加在一起 与水平同步信号中的模拟视频信号的DA转换的时钟同相，以获得待输出的第二水平同步信号; 液晶显示监视器的同步信号隔离电路将水平划分信号和水平同步信号与第二水平同步信号隔离; PLL产生与水平分频信号同步的A-D转换时钟。