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    Hardware support for non-disruptive upgrades
    91.
    发明授权
    Hardware support for non-disruptive upgrades 有权

    公开(公告)号：US10768819B2

    公开(公告)日：2020-09-08

    申请号：US15336624

    申请日：2016-10-27

    Applicant: Pure Storage, Inc.

    Inventor： Hari Kannan ,  Robert Lee

    IPC: G06F3/06 ,  G06F8/654 ,  G06F8/65 ,  G06F11/14 ,  G06F12/02

    Abstract: A method for non-disruptive upgrade of a storage system is provided. The method includes disabling, by an interlock, access by one or more processors of the storage system to the first memory, responsive to a request. The method includes persisting configuration information in the first memory to the solid-state memory, with the access to the first memory disabled by the interlock, wherein the persisting, the first memory and the solid-state memory are supported by an energy reserve. The method includes enabling, by the interlock, access by the one or more processors to the first memory, responsive to completing the persisting, and writing, by the one or more processors of the storage system, to the first memory, to perform the upgrade with further configuration information, with the access enabled by the interlock and wherein at least the persisting is accomplished without power cycling.

    INTELLIGENT REFRESH OF 3D NAND
    92.
    发明申请
    INTELLIGENT REFRESH OF 3D NAND 审中-公开

    公开(公告)号：US20200243148A1

    公开(公告)日：2020-07-30

    申请号：US16845916

    申请日：2020-04-10

    Applicant: Pure Storage, Inc.

    Inventor： Hari Kannan ,  Robert Lee ,  Yuhong Mao

    IPC: G11C16/34 ,  G06F11/10 ,  H04L1/20 ,  G06F11/07 ,  G01R31/317 ,  G11C11/402

    Abstract: A method for processing blocks of flash memory to decrease raw bit errors from the flash memory is provided. The method includes identifying one or more blocks of the flash memory for a refresh operation and writing information regarding the identified blocks, to a data structure. The method includes issuing background reads to the identified blocks, according to the data structure, as the refresh operation. The method may be embodied on a computer readable medium. In some embodiments the background reads may be based on a time based refresh responsive to an increase in raw bit error count in the flash memory over time.

    Method for processing blocks of flash memory
    94.
    发明授权
    Method for processing blocks of flash memory 有权

    公开(公告)号：US10650902B2

    公开(公告)日：2020-05-12

    申请号：US15668526

    申请日：2017-08-03

    Applicant: Pure Storage, Inc.

    Inventor： Hari Kannan ,  Robert Lee ,  Yuhong Mao

    IPC: G11C29/00 ,  G11C16/34 ,  G11C11/402 ,  G01R31/317 ,  G06F11/07 ,  H04L1/20 ,  G06F11/10 ,  G11C16/04

    Abstract: A method for processing blocks of flash memory to decrease raw bit errors from the flash memory is provided. The method includes identifying one or more blocks of the flash memory for a refresh operation and writing information regarding the identified blocks, to a data structure. The method includes issuing background reads to the identified blocks, according to the data structure, as the refresh operation. The method may be embodied on a computer readable medium. In some embodiments the background reads may be based on a time based refresh responsive to an increase in raw bit error count in the flash memory over time.

    Mapping Defective Memory in a Storage System
    95.
    发明申请
    Mapping Defective Memory in a Storage System 审中-公开

    公开(公告)号：US20190227875A1

    公开(公告)日：2019-07-25

    申请号：US16370645

    申请日：2019-03-29

    Applicant: PURE STORAGE, INC.

    Inventor： John D. Davis ,  John Hayes ,  Hari Kannan ,  Nenad Miladinovic ,  Zhangxi Tan

    IPC: G06F11/14 ,  G06F11/16 ,  G06F11/10 ,  G11C29/00 ,  G06F12/1009

    Abstract: A storage cluster is provided. The storage cluster includes a plurality of storage nodes within a chassis. The plurality of storage nodes has flash memory for storage of user data and is configured to distribute the user data and metadata throughout the plurality of storage nodes such that the storage nodes can access the user data with a failure of two of the plurality of storage nodes. Each of the storage nodes is configured to generate at least one address translation table that maps around defects in the flash memory on one of a per flash package basis, per flash die basis, per flash plane basis, per flash block basis, per flash page basis, or per physical address basis. Each of the plurality of storage nodes is configured to apply the at least one address translation table to write and read accesses of the user data.

    Data rebuild on feedback from a queue in a non-volatile solid-state storage
    96.
    发明授权
    Data rebuild on feedback from a queue in a non-volatile solid-state storage 有权

    公开(公告)号：US10216411B2

    公开(公告)日：2019-02-26

    申请号：US15285410

    申请日：2016-10-04

    Applicant: PURE STORAGE, INC.

    Inventor： John D. Davis ,  John Hayes ,  Hari Kannan ,  Nenad Miladinovic ,  Zhangxi Tan

    IPC: G06F11/10 ,  G06F3/06 ,  H03M13/37 ,  G11C29/52 ,  H03M13/15 ,  H03M13/11

    Abstract: A storage cluster is provided. The storage cluster includes a plurality of storage nodes, each of the plurality of storage nodes having nonvolatile solid-state memory and a plurality of operations queues coupled to the solid-state memory. The plurality of storage nodes is configured to distribute the user data and metadata throughout the plurality of storage nodes such that the plurality of storage nodes can access the user data with a failure of two of the plurality of storage nodes. Each of the plurality of storage nodes is configured to determine whether a read of 1 or more bits in the solid-state memory via a first path is within a latency budget. The plurality of storage nodes is configured to perform a read of user data or metadata via a second path, responsive to a determination that the read of the bit via the first path is not within the latency budget.

    Data rebuild on feedback from a queue in a non-volatile solid-state storage
    99.
    发明授权
    Data rebuild on feedback from a queue in a non-volatile solid-state storage 有权
    在非易失性固态存储器中从队列反馈的数据重建

    公开(公告)号：US09483346B2

    公开(公告)日：2016-11-01

    申请号：US14454503

    申请日：2014-08-07

    Applicant: Pure Storage, Inc.

    Inventor： John D. Davis ,  John Hayes ,  Zhangxi Tan ,  Hari Kannan ,  Nenad Miladinovic

    IPC: G01R31/3187 ,  G06F11/10 ,  H03M13/37 ,  H03M13/11 ,  H03M13/15

    CPC classification number: G06F3/0604 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/067 ,  G06F3/0688 ,  G06F11/1008 ,  G06F11/1068 ,  G11C29/52 ,  H03M13/1102 ,  H03M13/1515 ,  H03M13/154 ,  H03M13/373 ,  H03M13/3761

    Abstract: A storage cluster is provided. The storage cluster includes a plurality of storage nodes, each of the plurality of storage nodes having nonvolatile solid-state memory and a plurality of operations queues coupled to the solid-state memory. The plurality of storage nodes is configured to distribute the user data and metadata throughout the plurality of storage nodes such that the plurality of storage nodes can access the user data with a failure of two of the plurality of storage nodes. Each of the plurality of storage nodes is configured to determine whether a read of 1 or more bits in the solid-state memory via a first path is within a latency budget. The plurality of storage nodes is configured to perform a read of user data or metadata via a second path, responsive to a determination that the read of the bit via the first path is not within the latency budget.

    Abstract translation: 提供了一个存储集群。 存储集群包括多个存储节点，多个存储节点中的每一个具有非易失性固态存储器和耦合到固态存储器的多个操作队列。 多个存储节点被配置为在整个多个存储节点中分发用户数据和元数据，使得多个存储节点可以利用多个存储节点中的两个的故障来访问用户数据。 多个存储节点中的每一个被配置为确定经由第一路径的固态存储器中的1位或更多比特的读取是否处于等待时间预算内。 多个存储节点经配置以经由第二路径执行用户数据或元数据的读取，响应于确定经由第一路径的位的读取不在等待时间预算内。

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