公开(公告)号：US07510934B2

公开(公告)日：2009-03-31

申请号：US11807544

申请日：2007-05-29

申请人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

发明人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

IPC分类号： H01L21/336

CPC分类号： H01L27/11521 ,  H01L27/115

摘要： A nonvolatile memory device includes a semiconductor substrate, a device isolation film, a tunnel insulation film, a plurality of floating gates, an inter-gate dielectric film, and a control gate pattern. Trenches are formed in the substrate that define active regions therebetween. The device isolation film is in the trenches in the substrate. The tunnel insulation film is on the active regions of the substrate. The plurality of floating gates are each on the tunnel insulation film over the active regions of the substrate. The inter-gate dielectric film extends across the floating gates and the device isolation film. The control gate pattern is on the inter-gate dielectric film and extends across the floating gates. A central region of the device isolation film in the trenches has an upper major surface that is recessed below an upper major surface of a surrounding region of the device isolation film in the trenches. An edge of the recessed central region of the device isolation film is aligned with a sidewall of an adjacent one of the floating gates.

摘要翻译： 非易失性存储器件包括半导体衬底，器件隔离膜，隧道绝缘膜，多个浮置栅极，栅极间电介质膜和控制栅极图案。 沟槽形成在衬底中，其间限定有效区域。 器件隔离膜位于衬底中的沟槽中。 隧道绝缘膜位于衬底的有源区上。 多个浮置栅极分别位于衬底的有源区上的隧道绝缘膜上。 栅极间电介质膜延伸穿过浮栅和器件隔离膜。 控制栅极图案在栅极间电介质膜上并且跨越浮动栅极延伸。 沟槽中的器件隔离膜的中心区域具有在沟槽中的器件隔离膜的周围区域的上主表面下方凹陷的上主表面。 器件隔离膜的凹入的中心区域的边缘与相邻的一个浮动栅极的侧壁对准。

公开(公告)号：US20090038173A1

公开(公告)日：2009-02-12

申请号：US12183226

申请日：2008-07-31

申请人： Seung-Phyo AHN ,  Sang-Ik Lee ,  Byeong-Jo Ryoo ,  Sung-Ho Song ,  Jeong-Yun Kim ,  Yang-Hwan Kim ,  Jae-Hyuk Wee ,  Dong-Hyun Kim ,  Yoon-Seob Eom ,  Yang-Ho Kim

发明人： Seung-Phyo AHN ,  Sang-Ik Lee ,  Byeong-Jo Ryoo ,  Sung-Ho Song ,  Jeong-Yun Kim ,  Yang-Hwan Kim ,  Jae-Hyuk Wee ,  Dong-Hyun Kim ,  Yoon-Seob Eom ,  Yang-Ho Kim

IPC分类号： F26B25/00 ,  F26B11/02

CPC分类号： D06F58/24

摘要： A clothes drier comprises: a body; a drum rotatably installed at the body; a hot air supply unit configured to supply hot air into the drum; a heat exchanger configured to dehumidify air exhausted from the drum; a pipe unit configured to supply water to the heat exchanger and collect water from the heat exchanger; and a freeze damage preventing unit installed on the pipe unit. The clothes drier is provided with the freeze damage preventing unit configured to partially or completely discharge out water remaining in the heat exchanger after the clothes drier is stopped. Accordingly, freeze damage of the heat exchanger during winter time is prevented.

摘要翻译： 干衣机包括：身体; 可旋转地安装在身体的滚筒; 热空气供应单元，其构造成将热空气供应到所述滚筒中; 热交换器，其构造成对从所述滚筒排出的空气进行除湿; 管单元，其构造成向所述热交换器供水并从所述热交换器收集水; 以及安装在管道单元上的防冻装置。 干衣机设置有防冻损害防止单元，其构造成在衣物干燥器停止之后部分地或完全地排出残留在热交换器中的水。 因此，防止了冬季时的热交换器的冻结损坏。

公开(公告)号：US20090003704A1

公开(公告)日：2009-01-01

申请号：US12055677

申请日：2008-03-26

申请人： Jun-Ho Hwang ,  Byoung-Seok Yang ,  Gun-Pyo Na ,  Dong-Hyun Kim ,  Jong-Tae Kim

发明人： Jun-Ho Hwang ,  Byoung-Seok Yang ,  Gun-Pyo Na ,  Dong-Hyun Kim ,  Jong-Tae Kim

IPC分类号： G06K9/00

CPC分类号： G06F17/30899

摘要： Browser controlling method and system using an image are provided. The method includes inputting an image; recognizing the image; and executing a command based on the recognized image. Accordingly, the command based on the user's input image can be executed in the browser. Also, since the browser does not need to display various function buttons, the screen can be utilized more efficiently.

摘要翻译： 提供浏览器控制方法和使用图像的系统。 该方法包括输入图像; 识别形象; 以及基于所识别的图像执行命令。 因此，可以在浏览器中执行基于用户的输入图像的命令。 此外，由于浏览器不需要显示各种功能按钮，因此可以更有效地利用屏幕。

公开(公告)号：US20080284029A1

公开(公告)日：2008-11-20

申请号：US12151997

申请日：2008-05-12

申请人： Seong-Goo Kim ,  Hyeong-Sun Hong ,  Dong-Hyun Kim ,  Nam-Jung Kang

发明人： Seong-Goo Kim ,  Hyeong-Sun Hong ,  Dong-Hyun Kim ,  Nam-Jung Kang

IPC分类号： H01L21/768 ,  H01L23/522

CPC分类号： H01L29/4236 ,  H01L21/76829 ,  H01L21/76897 ,  H01L27/0207 ,  H01L27/10855 ,  H01L27/10876

摘要： Methods of forming a contact structure in a semiconductor device include providing a semiconductor substrate including active regions and word lines crossing the active regions. A first interlayer dielectric layer is formed on the semiconductor substrate. Direct contact plugs are formed extending through the first interlayer dielectric layer to contact selected ones of the active regions. Bit line structures are formed on the first interlayer dielectric layer and crossing the word lines that are coupled to the selected ones of the active regions by the direct contact plugs. A second interlayer dielectric layer is formed on the semiconductor substrate including the bit line structures. Barrier patterns are formed extending in parallel with bit line structures and into the second interlayer dielectric layer. Mask patterns are formed overlying an entirety of top surfaces of the direct contact plugs on the second interlayer dielectric layer and the bit line structures. The second and first interlayer dielectric layers are etched using the mask patterns, the barrier patterns and the bit line structures as an etching mask to form buried contact holes and buried contact plugs are formed in the buried contact holes.

摘要翻译： 在半导体器件中形成接触结构的方法包括提供包括有源区和跨越有源区的字线的半导体衬底。 在半导体衬底上形成第一层间电介质层。 形成延伸穿过第一层间电介质层的直接接触插塞以接触所选择的有源区域。 位线结构形成在第一层间电介质层上并且通过直接接触插塞与被选择的有源区域耦合的字线交叉。 在包括位线结构的半导体衬底上形成第二层间电介质层。 阻挡层图案形成为与位线结构平行延伸并进入第二层间电介质层。 掩模图形形成在第二层间介质层上的直接接触插塞的整个顶表面和位线结构上。 使用掩模图案蚀刻第二和第一层间电介质层，将掩模图案和位线结构作为蚀刻掩模形成埋入的接触孔，并且在埋入的接触孔中形成掩埋的接触插塞。

公开(公告)号：US20080242095A1

公开(公告)日：2008-10-02

申请号：US11824054

申请日：2007-06-29

申请人： Ky-Hyun Han ,  Dong-Hyun Kim

发明人： Ky-Hyun Han ,  Dong-Hyun Kim

IPC分类号： H01L21/311

CPC分类号： H01L21/3065

摘要： A method for fabricating a trench in a semiconductor device includes forming a mask pattern over a substrate, and etching the substrate to form a trench with a vertical profile, the etching performed at an etching rate of approximately 40 A/sec or less using an etching gas including a gas generating polymers

摘要翻译： 一种用于在半导体器件中制造沟槽的方法包括在衬底上形成掩模图案，并蚀刻衬底以形成具有垂直剖面的沟槽，使用蚀刻以约40A / sec或更低的蚀刻速率进行蚀刻 包括产生气体的聚合物的气体

公开(公告)号：US20080094317A1

公开(公告)日：2008-04-24

申请号：US11782905

申请日：2007-07-25

申请人： Dong-Hyun Kim

发明人： Dong-Hyun Kim

IPC分类号： G09G3/28

CPC分类号： H01J11/38 ,  H01J11/12 ,  H01J11/24 ,  H01J2211/245 ,  H01J2211/444

摘要： A plasma display panel including first and second substrates facing each other and spaced apart from each other, barrier ribs disposed between the first and second substrates and defining discharge cells, phosphor layers formed in the discharge cells, address electrodes arranged on the first substrate and extending in a first direction, first and second electrodes formed on the second substrate and extending in a second direction crossing the first direction, and a dielectric layer covering the first and second electrodes. Each of the first and second electrodes includes at least one bus line formed of a nontransparent material to extend in the second direction on the second substrate, and the dielectric layer is provided with grooves formed at portions adjacent to the bus lines so as to increase the intensity of the visible light generated by the gas discharge in the discharge cells.

摘要翻译： 一种等离子体显示面板，包括彼此面对并且彼此间隔开的第一和第二基板，设置在第一和第二基板之间并限定放电单元的阻挡肋，形成在放电单元中的荧光体层，布置在第一基板上的寻址电极， 在第一方向上，形成在第二基板上并沿与第一方向交叉的第二方向延伸的第一和第二电极以及覆盖第一和第二电极的电介质层。 第一和第二电极中的每一个包括由不透明材料形成的至少一条总线，以在第二基板上沿第二方向延伸，并且电介质层设置有形成在与总线相邻的部分处的凹槽，以便增加 由放电单元中的气体放电产生的可见光的强度。

公开(公告)号：US07361435B2

公开(公告)日：2008-04-22

申请号：US11289204

申请日：2005-11-28

申请人： Chul-Hong Park ,  Moon-Hyun Yoo ,  Yoo-Hyon Kim ,  Dong-Hyun Kim ,  Soo-Han Choi

发明人： Chul-Hong Park ,  Moon-Hyun Yoo ,  Yoo-Hyon Kim ,  Dong-Hyun Kim ,  Soo-Han Choi

IPC分类号： G03F1/00 ,  G03F1/14 ,  G06F17/50

CPC分类号： G03F1/30 ,  G03F1/32 ,  G03F1/70 ,  G03F7/70466

摘要： A method of creating a layout of a set of masks including an alternating phase shifting mask (APSM) and a halftone phase shifting trim mask (HPSTM) is provided. The APSM includes first and second phase shifting areas and a first opaque pattern. The first and second phase shifting areas are disposed adjacent to each other and have different phases for generating destructive interference. Further, the first and second phase shifting areas define an access interconnection line. The first opaque pattern is formed on a transparent substrate to define the first and second phase shifting areas. The HPSTM includes a second opaque pattern on the transparent substrate and a halftone pattern. The second opaque pattern prevents an access interconnection line from being erased. The halftone pattern defines a pass interconnection line connected to the access interconnection line.

摘要翻译： 提供了一种创建包括交替相移掩模（APSM）和半色调相移修剪蒙版（HPSTM）的掩模组的布局的方法。 APSM包括第一和第二相移区域和第一不透明图案。 第一和第二相移区域彼此相邻设置并且具有不同的相位以产生破坏性干扰。 此外，第一和第二相移区域限定了接入互连线。 第一不透明图案形成在透明基板上以限定第一和第二相移区域。 HPSTM在透明基板上包括第二不透明图案和半色调图案。 第二个不透明图案防止访问互连线被擦除。 半色调图案定义了连接到接入互连线的通过互连线。

公开(公告)号：US07338849B2

公开(公告)日：2008-03-04

申请号：US11261820

申请日：2005-10-28

申请人： Dong-Chan Kim ,  Chang-Jin Kang ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

发明人： Dong-Chan Kim ,  Chang-Jin Kang ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

IPC分类号： H01L21/8238 ,  H01L29/788

CPC分类号： H01L27/11521 ,  H01L27/115

摘要： Methods of fabricating a flash memory device and flash memory devices fabricated thereby are provided. One of the methods includes forming an isolation layer in a semiconductor substrate to define a plurality of parallel active regions in the semiconductor substrate. A plurality of first conductive layer patterns are formed on the active regions. The first conductive layer patterns are spaced apart from each other in a lengthwise direction of the active regions. An insulating layer is conformally formed on the semiconductor substrate and the first conductive layer patterns. A second conductive layer is formed on the insulating layer. The second conductive layer is patterned until the insulating layer is exposed to form a plurality of parallel second conductive layer patterns. The second conductive layer patterns cross the active regions and the isolation layer to overlap the first conductive layer patterns.

摘要翻译： 提供了制造闪速存储器件的方法和由此制造的闪存器件。 一种方法包括在半导体衬底中形成隔离层以在半导体衬底中限定多个平行的有源区。 在有源区上形成多个第一导电层图案。 第一导电层图案在活性区域的长度方向上彼此间隔开。 在半导体衬底和第一导电层图案上共形形成绝缘层。 在绝缘层上形成第二导电层。 图案化第二导电层直到绝缘层暴露以形成多个平行的第二导电层图案。 第二导电层图案与有源区和隔离层交叉，以与第一导电层图案重叠。

公开(公告)号：US07246532B2

公开(公告)日：2007-07-24

申请号：US11431521

申请日：2006-05-11

申请人： Dong-Hyun Kim ,  Bok-Seok Yang ,  Do-Hyun Cho ,  Hwan-Ki Choi ,  Jae-Han Koo

发明人： Dong-Hyun Kim ,  Bok-Seok Yang ,  Do-Hyun Cho ,  Hwan-Ki Choi ,  Jae-Han Koo

IPC分类号： G01N1/00

CPC分类号： G01N1/24 ,  G01F1/20 ,  G01F1/22 ,  G01F1/28 ,  G01N2001/2223 ,  G01N2001/2285 ,  G01N2015/1486

摘要： A flow indicator comprising a housing and a floater and adapted to draw an air sample is provided. The housing has at least one lower inlet port, an interior space, an upper outlet port, and a transparent window. The floater is disposed inside the housing and is adapted to move substantially vertically in accordance with the flow of the air sample. The floater is also adapted to indicate a flow rate of the air sample.

摘要翻译： 提供了包括壳体和浮子并适于抽取空气样本的流量指示器。 壳体具有至少一个下部入口端口，内部空间，上部出口端口和透明窗口。 浮子设置在壳体内部并且适于根据空气样本的流动基本垂直地移动。 漂浮器还适于指示空气样品的流速。

公开(公告)号：US07242054B2

公开(公告)日：2007-07-10

申请号：US11190314

申请日：2005-07-26

申请人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

发明人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

IPC分类号： H01L29/788 ,  H01L29/423

CPC分类号： H01L27/11521 ,  H01L27/115

摘要： A nonvolatile memory device includes a semiconductor substrate, a device isolation film, a tunnel insulation film, a plurality of floating gates, an inter-gate dielectric film, and a control gate pattern. Trenches are formed in the substrate that define active regions therebetween. The device isolation film is in the trenches in the substrate. The tunnel insulation film is on the active regions of the substrate. The plurality of floating gates are each on the tunnel insulation film over the active regions of the substrate. The inter-gate dielectric film extends across the floating gates and the device isolation film. The control gate pattern is on the inter-gate dielectric film and extends across the floating gates. A central region of the device isolation film in the trenches has an upper major surface that is recessed below an upper major surface of a surrounding region of the device isolation film in the trenches. An edge of the recessed central region of the device isolation film is aligned with a sidewall of an adjacent one of the floating gates.

摘要翻译： 非易失性存储器件包括半导体衬底，器件隔离膜，隧道绝缘膜，多个浮置栅极，栅极间电介质膜和控制栅极图案。 沟槽形成在衬底中，其间限定有效区域。 器件隔离膜位于衬底中的沟槽中。 隧道绝缘膜位于衬底的有源区上。 多个浮置栅极分别位于衬底的有源区上的隧道绝缘膜上。 栅极间电介质膜延伸穿过浮栅和器件隔离膜。 控制栅极图案在栅极间电介质膜上并且跨越浮动栅极延伸。 沟槽中的器件隔离膜的中心区域具有在沟槽中的器件隔离膜的周围区域的上主表面下方凹陷的上主表面。 器件隔离膜的凹入的中心区域的边缘与相邻的一个浮动栅极的侧壁对准。