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    Nonvolatile memory devices and methods of fabricating the same
    1.
    发明申请
    Nonvolatile memory devices and methods of fabricating the same 有权
    非易失性存储器件及其制造方法

    公开(公告)号：US20060027856A1

    公开(公告)日：2006-02-09

    申请号：US11190314

    申请日：2005-07-26

    申请人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

    发明人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

    IPC分类号： H01L21/8238 ,  H01L29/788

    CPC分类号： H01L27/11521 ,  H01L27/115

    摘要： A nonvolatile memory device includes a semiconductor substrate, a device isolation film, a tunnel insulation film, a plurality of floating gates, an inter-gate dielectric film, and a control gate pattern. Trenches are formed in the substrate that define active regions therebetween. The device isolation film is in the trenches in the substrate. The tunnel insulation film is on the active regions of the substrate. The plurality of floating gates are each on the tunnel insulation film over the active regions of the substrate. The inter-gate dielectric film extends across the floating gates and the device isolation film. The control gate pattern is on the inter-gate dielectric film and extends across the floating gates. A central region of the device isolation film in the trenches has an upper major surface that is recessed below an upper major surface of a surrounding region of the device isolation film in the trenches. An edge of the recessed central region of the device isolation film is aligned with a sidewall of an adjacent one of the floating gates.

    摘要翻译： 非易失性存储器件包括半导体衬底，器件隔离膜，隧道绝缘膜，多个浮置栅极，栅极间电介质膜和控制栅极图案。 沟槽形成在衬底中，其间限定有效区域。 器件隔离膜位于衬底中的沟槽中。 隧道绝缘膜位于衬底的有源区上。 多个浮置栅极分别位于衬底的有源区上的隧道绝缘膜上。 栅极间电介质膜延伸穿过浮栅和器件隔离膜。 控制栅极图案在栅极间电介质膜上并且跨越浮动栅极延伸。 沟槽中的器件隔离膜的中心区域具有在沟槽中的器件隔离膜的周围区域的上主表面下方凹陷的上主表面。 器件隔离膜的凹入的中心区域的边缘与相邻的一个浮动栅极的侧壁对准。

    Methods of fabricating nonvolatile memory devices
    2.
    发明申请
    Methods of fabricating nonvolatile memory devices 有权
    制造非易失性存储器件的方法

    公开(公告)号：US20070231989A1

    公开(公告)日：2007-10-04

    申请号：US11807544

    申请日：2007-05-29

    申请人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

    发明人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

    IPC分类号： H01L21/8238

    CPC分类号： H01L27/11521 ,  H01L27/115

    摘要： A nonvolatile memory device includes a semiconductor substrate, a device isolation film, a tunnel insulation film, a plurality of floating gates, an inter-gate dielectric film, and a control gate pattern. Trenches are formed in the substrate that define active regions therebetween. The device isolation film is in the trenches in the substrate. The tunnel insulation film is on the active regions of the substrate. The plurality of floating gates are each on the tunnel insulation film over the active regions of the substrate. The inter-gate dielectric film extends across the floating gates and the device isolation film. The control gate pattern is on the inter-gate dielectric film and extends across the floating gates. A central region of the device isolation film in the trenches has an upper major surface that is recessed below an upper major surface of a surrounding region of the device isolation film in the trenches. An edge of the recessed central region of the device isolation film is aligned with a sidewall of an adjacent one of the floating gates.

    摘要翻译： 非易失性存储器件包括半导体衬底，器件隔离膜，隧道绝缘膜，多个浮置栅极，栅极间电介质膜和控制栅极图案。 沟槽形成在衬底中，其间限定有效区域。 器件隔离膜位于衬底中的沟槽中。 隧道绝缘膜位于衬底的有源区上。 多个浮置栅极分别位于衬底的有源区上的隧道绝缘膜上。 栅极间电介质膜延伸穿过浮栅和器件隔离膜。 控制栅极图案在栅极间电介质膜上并且跨越浮动栅极延伸。 沟槽中的器件隔离膜的中心区域具有在沟槽中的器件隔离膜的周围区域的上主表面下方凹陷的上主表面。 器件隔离膜的凹入的中心区域的边缘与相邻的一个浮动栅极的侧壁对准。

    Methods of fabricating nonvolatile memory devices
    3.
    发明授权
    Methods of fabricating nonvolatile memory devices 有权
    制造非易失性存储器件的方法

    公开(公告)号：US07510934B2

    公开(公告)日：2009-03-31

    申请号：US11807544

    申请日：2007-05-29

    申请人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

    发明人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

    IPC分类号： H01L21/336

    CPC分类号： H01L27/11521 ,  H01L27/115

    摘要： A nonvolatile memory device includes a semiconductor substrate, a device isolation film, a tunnel insulation film, a plurality of floating gates, an inter-gate dielectric film, and a control gate pattern. Trenches are formed in the substrate that define active regions therebetween. The device isolation film is in the trenches in the substrate. The tunnel insulation film is on the active regions of the substrate. The plurality of floating gates are each on the tunnel insulation film over the active regions of the substrate. The inter-gate dielectric film extends across the floating gates and the device isolation film. The control gate pattern is on the inter-gate dielectric film and extends across the floating gates. A central region of the device isolation film in the trenches has an upper major surface that is recessed below an upper major surface of a surrounding region of the device isolation film in the trenches. An edge of the recessed central region of the device isolation film is aligned with a sidewall of an adjacent one of the floating gates.

    摘要翻译： 非易失性存储器件包括半导体衬底，器件隔离膜，隧道绝缘膜，多个浮置栅极，栅极间电介质膜和控制栅极图案。 沟槽形成在衬底中，其间限定有效区域。 器件隔离膜位于衬底中的沟槽中。 隧道绝缘膜位于衬底的有源区上。 多个浮置栅极分别位于衬底的有源区上的隧道绝缘膜上。 栅极间电介质膜延伸穿过浮栅和器件隔离膜。 控制栅极图案在栅极间电介质膜上并且跨越浮动栅极延伸。 沟槽中的器件隔离膜的中心区域具有在沟槽中的器件隔离膜的周围区域的上主表面下方凹陷的上主表面。 器件隔离膜的凹入的中心区域的边缘与相邻的一个浮动栅极的侧壁对准。

    Nonvolatile memory devices
    4.
    发明授权
    Nonvolatile memory devices 有权
    非易失性存储器件

    公开(公告)号：US07242054B2

    公开(公告)日：2007-07-10

    申请号：US11190314

    申请日：2005-07-26

    申请人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

    发明人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

    IPC分类号： H01L29/788 ,  H01L29/423

    CPC分类号： H01L27/11521 ,  H01L27/115

    摘要： A nonvolatile memory device includes a semiconductor substrate, a device isolation film, a tunnel insulation film, a plurality of floating gates, an inter-gate dielectric film, and a control gate pattern. Trenches are formed in the substrate that define active regions therebetween. The device isolation film is in the trenches in the substrate. The tunnel insulation film is on the active regions of the substrate. The plurality of floating gates are each on the tunnel insulation film over the active regions of the substrate. The inter-gate dielectric film extends across the floating gates and the device isolation film. The control gate pattern is on the inter-gate dielectric film and extends across the floating gates. A central region of the device isolation film in the trenches has an upper major surface that is recessed below an upper major surface of a surrounding region of the device isolation film in the trenches. An edge of the recessed central region of the device isolation film is aligned with a sidewall of an adjacent one of the floating gates.

    摘要翻译： 非易失性存储器件包括半导体衬底，器件隔离膜，隧道绝缘膜，多个浮置栅极，栅极间电介质膜和控制栅极图案。 沟槽形成在衬底中，其间限定有效区域。 器件隔离膜位于衬底中的沟槽中。 隧道绝缘膜位于衬底的有源区上。 多个浮置栅极分别位于衬底的有源区上的隧道绝缘膜上。 栅极间电介质膜延伸穿过浮栅和器件隔离膜。 控制栅极图案在栅极间电介质膜上并且跨越浮动栅极延伸。 沟槽中的器件隔离膜的中心区域具有在沟槽中的器件隔离膜的周围区域的上主表面下方凹陷的上主表面。 器件隔离膜的凹入的中心区域的边缘与相邻的一个浮动栅极的侧壁对准。

    NON-VOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE DEVICE
    6.
    发明申请
    NON-VOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE DEVICE 审中-公开
    非易失性存储器件和用于制造器件的方法

    公开(公告)号：US20130181278A1

    公开(公告)日：2013-07-18

    申请号：US13608796

    申请日：2012-09-10

    申请人： Sung-Hun LEE ,  Sung-Hoi Hur ,  Jong-Ho Park

    发明人： Sung-Hun LEE ,  Sung-Hoi Hur ,  Jong-Ho Park

    IPC分类号： H01L29/792

    CPC分类号： H01L27/1157 ,  H01L21/764 ,  H01L27/11524 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/42324 ,  H01L29/4234

    摘要： Provided is a non-volatile memory device that includes a substrate including a plurality of active regions extending in a first direction and a plurality of element isolation trenches disposed between the active regions, a plurality of tunnel insulating layer patterns and a plurality of storage layer patterns sequentially disposed on the substrate, a plurality of blocking insulating layers and a plurality of gate electrodes disposed on the storage layer patterns and extending in a second direction perpendicular to the first direction, and first insulating layers including air gaps disposed between the active regions on the element isolation trenches and extending in the first direction, wherein the active regions include first active regions and second active regions adjacent to the first active regions, wherein a width of first air gaps is different from a width of second air gaps.

    摘要翻译： 提供了一种非易失性存储器件，其包括：衬底，其包括在第一方向上延伸的多个有源区和设置在有源区之间的多个元件隔离沟槽;多个隧道绝缘层图案和多个存储层图案 顺序地设置在基板上，多个阻挡绝缘层和多个栅电极，其设置在存储层图案上并沿垂直于第一方向的第二方向延伸，并且第一绝缘层包括设置在第一方向上的有源区之间的气隙 元件隔离沟槽并沿第一方向延伸，其中有源区包括与第一有源区相邻的第一有源区和第二有源区，其中第一气隙的宽度不同于第二气隙的宽度。

    FEMTO ACCESS POINT AND METHOD FOR AUTOMATICALLY SETTING AREA CODE
    8.
    发明申请
    FEMTO ACCESS POINT AND METHOD FOR AUTOMATICALLY SETTING AREA CODE 审中-公开
    FEMTO接入点和自动设置区域代码的方法

    公开(公告)号：US20120088496A1

    公开(公告)日：2012-04-12

    申请号：US13266384

    申请日：2010-04-21

    申请人： Ki-Ho Lee ,  Hee-Jun Lee ,  Joong-Wan Park ,  Jong-Ho Park

    发明人： Ki-Ho Lee ,  Hee-Jun Lee ,  Joong-Wan Park ,  Jong-Ho Park

    IPC分类号： H04W4/00

    CPC分类号： H04W24/02 ,  H04W8/26 ,  H04W28/06 ,  H04W48/16 ,  H04W84/045

    摘要： Provided is a method for automatically setting an area code by a femto access point (AP) located in a coverage area of a macro cell. The method includes receiving a broadcast signal of the macro cell, extracting an area code of the macro cell from the received broadcast signal, and setting the extracted area code as an area code of the femto cell. The femto AP sets the same area code as that of the macro cell as its area code and transmits the area code of the femto AP to the mobile station, thereby preventing the mobile station from repeating the location registration and enabling the mobile station to receive the same paging message from the femto AP and the macro cell.

    摘要翻译： 提供了一种通过位于宏小区的覆盖区域中的毫微微接入点（AP）自动设置区域码的方法。 该方法包括接收宏小区的广播信号，从接收到的广播信号中提取宏小区的区域码，并将所提取的区域码设置为毫微微小区的区域码。 毫微微AP设置与宏小区相同的区域码作为其区号，并将毫微微AP的区域码发送到移动台，从而防止移动台重复位置登记，并使移动台能够接收 来自毫微微AP和宏小区的相同寻呼消息。

    Non-volatile memory devices having floating gates
    10.
    发明授权
    Non-volatile memory devices having floating gates 失效
    具有浮动门的非易失性存储器件

    公开(公告)号：US07592665B2

    公开(公告)日：2009-09-22

    申请号：US11594327

    申请日：2006-11-08

    申请人： Joon-Hee Lee ,  Jong-Ho Park ,  Jin-Hyun Shin ,  Sung-Hoi Hur ,  Yong-Seok Kim ,  Jong-Won Kim

    发明人： Joon-Hee Lee ,  Jong-Ho Park ,  Jin-Hyun Shin ,  Sung-Hoi Hur ,  Yong-Seok Kim ,  Jong-Won Kim

    IPC分类号： H01L29/788

    CPC分类号： H01L29/7881 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324

    摘要： A nonvolatile memory device may include a substrate having a cell region, and a cell device isolation layer on the cell region of the substrate to define a cell active region. A floating gate may include a lower floating gate and an upper floating gate sequentially stacked on the cell active region, and a tunnel insulation pattern may be between the floating gate and the cell active region. A control gate electrode may be on the floating gate, and a blocking insulation pattern may be between the control gate electrode and the floating gate. More particularly, the upper floating gate may include a flat portion on the lower floating gate and a pair of wall portions extending upward from both edges of the flat portion adjacent to the cell device isolation layer. Moreover, a width of an upper portion of a space surrounded by the flat portion and the pair of wall portions may be larger than a width of a lower portion of the space. Related methods are also discussed.

    摘要翻译： 非易失性存储器件可以包括具有单元区域的衬底和在衬底的单元区域上的单元器件隔离层，以限定电池活性区域。 浮置栅极可以包括顺序堆叠在单元有源区上的下浮置栅极和上浮置栅极，并且隧道绝缘图案可以在浮栅和电池有源区之间。 控制栅极电极可以在浮置栅极上，并且阻挡绝缘图案可以在控制栅电极和浮栅之间。 更具体地说，上部浮动栅极可以包括在下部浮动栅极上的平坦部分和从邻近电池器件隔离层的平坦部分的两个边缘向上延伸的一对壁部分。 此外，由平坦部分和一对壁部分围绕的空间的上部的宽度可以大于空间的下部的宽度。 还讨论了相关方法。