公开(公告)号：US08294607B2

公开(公告)日：2012-10-23

申请号：US12915976

申请日：2010-10-29

Applicant: Naresh Kesavan Rao ,  Nanette Gruber

Inventor： Naresh Kesavan Rao ,  Nanette Gruber

IPC: H03M1/56

CPC classification number: H03M1/123 ,  H03M1/403

Abstract: A multichannel digitizer and method of digitizing are provided. One digitizer includes an analog to digital convertor (ADC) having a plurality of channels receiving input analog signals; an operational amplifier in each channel and a comparator connected to the operational amplifier. The ADC further includes a logic circuit in each channel connected to the comparator and configured to generate an output based on a comparator signal received from the comparator. The ADC also includes a ramp generator connected to the plurality of channels and configured to provide a time varying reference signal.

Abstract translation: 提供了多通道数字化仪和数字化方法。 一个数字转换器包括具有接收输入模拟信号的多个通道的模数转换器（ADC）; 每个通道中的运算放大器和连接到运算放大器的比较器。 ADC还包括连接到比较器的每个通道中的逻辑电路，并且被配置为基于从比较器接收的比较器信号来产生输出。 ADC还包括连接到多个通道并被配置为提供时变参考信号的斜坡发生器。

公开(公告)号：US08203477B2

公开(公告)日：2012-06-19

申请号：US12662449

申请日：2010-04-19

Applicant: Jeonghwan Lee ,  Gunhee Han ,  Kwi Sung Yoo ,  Seog Heon Ham

Inventor： Jeonghwan Lee ,  Gunhee Han ,  Kwi Sung Yoo ,  Seog Heon Ham

IPC: H03M1/56

CPC classification number: H03M1/1225 ,  H03M1/144 ,  H03M1/56

Abstract: In one embodiment, an analog-to-digital converter (ADC) includes a comparator and a supply circuit. The comparator is configured to compare an input signal to a reference signal. The supply circuit is configured to supply the reference signal. The supply circuit is configured to provide different circuit configurations for supplying the reference signal during different stages of analog-to-digital conversion such that the reference signal is scaled in substantially a same manner during at least two of the stages.

Abstract translation: 在一个实施例中，模数转换器（ADC）包括比较器和电源电路。 比较器被配置为将输入信号与参考信号进行比较。 供电电路被配置为提供参考信号。 供电电路被配置为提供不同的电路配置，用于在模数转换的不同阶段期间提供参考信号，使得参考信号在至少两个阶段期间以基本上相同的方式缩放。

公开(公告)号：US20110205100A1

公开(公告)日：2011-08-25

申请号：US13038502

申请日：2011-03-02

Applicant: JAN BOGAERTS

Inventor： JAN BOGAERTS

IPC: H03M1/56

CPC classification number: H04N5/3575 ,  G06J1/00 ,  H03M1/1019 ,  H03M1/123 ,  H03M1/202 ,  H03M1/56 ,  H04N5/3742 ,  H04N5/3743 ,  H04N5/378

Abstract: An analog-to-digital converter (ADC) generates an output digital value equivalent to the difference between two analog signal values. The ADC 30 receives a first analog signal level, a second analog signal level and a ramp signal. A counter 32 is operable to count in a single direction. A control stage is arranged to enable the counter 32 based on a comparison 19 of the ramp signal with the first analog signal and the second analog signal. A digital value accumulated by the counter during a period when it is enabled forms the output. The ADC can perform the conversion during a single cycle of the ramp signal. The counter 32 can be loaded with a starting digital value representing an exposure level accumulated during a previous exposure period. Techniques are described for reducing the conversion time.

公开(公告)号：US07973695B2

公开(公告)日：2011-07-05

申请号：US12659802

申请日：2010-03-22

Applicant: Shigetaka Kudo

Inventor： Shigetaka Kudo

IPC: H03M1/56

CPC classification number: H04N5/374 ,  H03K4/02 ,  H03M1/1023 ,  H03M1/123 ,  H03M1/56 ,  H04N5/378

Abstract: An electronic apparatus includes: an AD conversion section that has a comparing section, which receives a reference signal whose level changes gradually from a reference signal generating section that generates the reference signal and which compares the reference signal with an analog signal to be processed, and a counter section, which receives a count clock for AD conversion and performs a count operation on the basis of a comparison result of the comparing section, and that acquires digital data of the signal to be processed on the basis of output data of the counter section; a count operation period control section that controls an operation period of the counter section in each processing period on the basis of the comparison result of the comparing section; and a driving control section that controls the reference signal generating section and the AD conversion section.

Abstract translation: 一种电子设备，包括：AD转换部分，具有比较部分，其接收电平从产生参考信号的参考信号产生部分逐渐变化并将参考信号与待处理的模拟信号进行比较的参考信号;以及 计数器部分，其接收用于AD转换的计数时钟，并且基于比较部分的比较结果执行计数操作，并且基于计数器部分的输出数据获取要处理的信号的数字数据 ; 计数运算周期控制部，根据比较部的比较结果，对每个处理期间的计数部的运算期间进行控制; 以及驱动控制部分，其控制参考信号产生部分和AD转换部分。

公开(公告)号：US07746521B2

公开(公告)日：2010-06-29

申请号：US11649664

申请日：2007-01-04

Applicant: Kwang-Hyun Lee

Inventor： Kwang-Hyun Lee

IPC: H04N1/04 ,  H03M1/00 ,  H03M1/56

CPC classification number: H04N5/378 ,  H03M1/123 ,  H03M1/56 ,  H04N5/3575

Abstract: An analog-to-digital converter in an image sensor is implemented with a plurality of comparator units. Each comparator unit has a respective capacitor array and respective switches integrated therein. Such capacitors and switches across the comparator units are operated for generating ramp voltages for such comparator units for performing analog-to-digital conversion with correlated double sampling. Thus, circuit area and power consumption of the CMOS image sensor may be minimized.

Abstract translation: 图像传感器中的模拟 - 数字转换器由多个比较器单元实现。 每个比较器单元具有相应的电容器阵列和集成在其中的各个开关。 操作比较器单元之间的这种电容器和开关用于产​​生用于这种比较器单元的斜坡电压，用于通过相关的双采样进行模数转换。 因此，可以使CMOS图像传感器的电路面积和功耗最小化。

公开(公告)号：US07710306B2

公开(公告)日：2010-05-04

申请号：US11937054

申请日：2007-11-08

Applicant: Akiko Mori

Inventor： Akiko Mori

IPC: H03M1/56

CPC classification number: H03K4/50 ,  H03M1/123 ,  H03M1/56

Abstract: A ramp generation circuit including, a charge supply unit which generates predetermined charges every predetermined time, an integration circuit which accumulates the charges generated from the charge supply unit and converts the charges into a voltage, and, an attenuation unit which outputs, to an output terminal, a voltage obtained by attenuating a noise value of an output voltage from the integration circuit.

Abstract translation: 一种斜坡发生电路，包括：每个预定时间产生预定电荷的电荷供给单元;积分电路，累积从所述电荷供给单元生成的电荷，并将所述电荷转换为电压;以及衰减单元，输出到输出 端子，通过衰减来自积分电路的输出电压的噪声值而获得的电压。

公开(公告)号：US07554479B2

公开(公告)日：2009-06-30

申请号：US11962398

申请日：2007-12-21

Applicant: Yong Lim

Inventor： Yong Lim

IPC: H03M1/56

CPC classification number: H03M1/144 ,  H03M1/123 ,  H03M1/56

Abstract: An analog signal is converted to a digital value having a given number of bits that define given quantization levels, by repeatedly sampling the analog signal at a resolution that is less than that which is defined by the given number of bits. Lower resolution sampling results are thereby obtained. The lower resolution sampling results are summed to obtain the digital value having the given number of bits.

Abstract translation: 通过以小于由给定位数定义的分辨率重复采样模拟信号，将模拟信号转换为具有定义给定量化电平的给定位数的数字值。 从而获得较低分辨率的采样结果。 将较低分辨率采样结果相加以获得具有给定位数的数字值。

公开(公告)号：US07095355B1

公开(公告)日：2006-08-22

申请号：US11125509

申请日：2005-05-09

Applicant: Roger W. Graham ,  John T. Caulfield

Inventor： Roger W. Graham ,  John T. Caulfield

IPC: H03M1/12 ,  H03M1/56 ,  H01L27/00

CPC classification number: H04N5/37455 ,  H03M1/145 ,  H03M1/56 ,  H04N5/33

Abstract: An analog to digital converter ADC is adapted for low power for use in an imaging array. The ADC is a digital inverter with feedback to convert an asynchronous ramp voltage to an output count at each crossing of a voltage threshold. A separate circuit generates a voltage ramp that is coupled through a capacitor to a photocurrent from a detector, generating an integrating voltage that is raised at a source follower circuit. The integrating voltage from the source follower circuit is converted to another voltage ramp and inverted at the ADC. A global count from an array of such ADCs is stored in a grey counter. The ADC is sufficiently power-efficient that each unit cell of an array of photo detectors can have its own ADC. Circuit and device-level embodiments are disclosed.

Abstract translation: 模数转换器ADC适用于成像阵列中的低功耗。 ADC是具有反馈功能的数字逆变器，用于在电压阈值的每个交叉处将异步斜坡电压转换为输出计数。 单独的电路产生电压斜坡，其通过电容器耦合到来自检测器的光电流，产生在源极跟随器电路处升高的积分电压。 源极跟随器电路的积分电压转换为另一个电压斜坡，并在ADC处反相。 来自这种ADC的阵列的全局计数被存储在灰色计数器中。 ADC具有足够的功率效率，使得光电检测器阵列的每个单元可以具有自己的ADC。 公开了电路和设备级实施例。

公开(公告)号：US20060001564A1

公开(公告)日：2006-01-05

申请号：US10998728

申请日：2004-11-30

Applicant: Seiji Yamagata ,  Jun Funakoshi ,  Tsuyoshi Higuchi ,  Toshitaka Mizuguchi

Inventor： Seiji Yamagata ,  Jun Funakoshi ,  Tsuyoshi Higuchi ,  Toshitaka Mizuguchi

IPC: H03M1/56

CPC classification number: H03M1/0619 ,  H03M1/0845 ,  H03M1/56

Abstract: A ramp waveform generation circuit which comprises a first reference power supply, and supplies a ramp waveform signal to an analog/digital conversion circuit further comprises a connection circuit for reflecting the amount of fluctuation of the output potential of a second reference power supply which is installed in a noise elimination circuit for eliminating the noise of an analog signal inputted to the analog/digital conversion circuit in the output potential of the first reference power supply.

Abstract translation: 包括第一参考电源并将斜坡波形信号提供给模拟/数字转换电路的斜坡波形产生电路还包括连接电路，用于反映安装的第二参考电源的输出电位的波动量 在噪声消除电路中，用于消除在第一参考电源的输出电位中输入到模拟/数字转换电路的模拟信号的噪声。

公开(公告)号：US06965407B2

公开(公告)日：2005-11-15

申请号：US10106399

申请日：2002-03-25

Applicant: Christian Boemler ,  Jeffrey J. Zarnowski

Inventor： Christian Boemler ,  Jeffrey J. Zarnowski

IPC: H03M1/12 ,  H03M1/56 ,  H04N5/365 ,  H04N3/14 ,  H04N5/335

CPC classification number: H03M1/123 ,  H03M1/1019 ,  H03M1/1235 ,  H03M1/56 ,  H04N5/335

Abstract: A solid state imager includes an arrangement for converting analog pixel values to digital form on an arrayed per-column basis. An N-bit counter supplies an N-bit DAC to produce an analog ramp output providing a ramp signal with a level that varies corresponding to the contents of the counter. Latches or equivalent digital storage elements are each associated with a respective column. A counter bus connects the counter to latch inputs of said latches, and comparators associated the columns gate the latches when the analog ramp equals the pixel value for that column. The contents of the latch elements are transferred sequentially to a video output bus to produce the digital video signal. There can be additionally black-level readout latch elements, for storing a digital value that corresponds to the dark or black video level, and a subtraction element subtracts the black level value from the pixel value to reduce fixed pattern noise. An additional array of buffer latches can be employed.

Abstract translation: 固态成像器包括用于将阵列每列的模拟像素值转换为数字形式的装置。 N位计数器提供N位DAC以产生模拟斜坡输出，提供具有与计数器内容相对应的电平的斜坡信号。 锁存器或等效的数字存储元件各自与相应的列相关联。 计数器总线将计数器连接到所述锁存器的锁存器输入端，当模拟斜坡等于该列的像素值时，相关联的列的比较器对锁存器进行门控。 锁存元件的内容被顺序地传送到视频输出总线以产生数字视频信号。 还可以存储黑电平读出锁存元件，用于存储对应于暗或黑色视频电平的数字值，减法元件从像素值中减去黑电平值以减少固定图案噪声。 可以采用附加的缓冲锁存器阵列。