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公开(公告)号：US20190165979A1
公开(公告)日：2019-05-30
申请号：US16203283
申请日：2018-11-28
发明人： Wei YANG , Renqiu WANG , Yi HUANG , Seyong PARK , Alexandros MANOLAKOS
摘要： In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may determine a UE. The apparatus may generate a reference signal using a base sequence obtained from a table, the table including a plurality of base sequences that each have a peak-to-average-power ratio (PAPR) metric below a threshold. Then, the apparatus transmits the reference signal to a base station. The reference signal may be multiplexed with a data transmission.
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公开(公告)号：US10305676B2
公开(公告)日：2019-05-28
申请号：US15168080
申请日：2016-05-29
发明人： Hendricus de Ruijter , Ping Xiong , Wentao Li , Yan Zhou
摘要： An apparatus includes a radio frequency (RF) receiver, which includes a digital signal arrival (DSA) detector to detect arrival of a transmitted signal. The DSA detector includes a signal correlator and at least one of (a) an absolute received signal strength indication (RSSI) detector; (b) a relative RSSI detector; and (c) a frequency offset detector). The RF receiver further includes a demodulator coupled to the DSA detector to demodulate a received signal and to provide a demodulated signal, and a synchronization word detector (SWD) coupled to the demodulator to receive the demodulated signal.
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公开(公告)号：US20190158268A1
公开(公告)日：2019-05-23
申请号：US15820395
申请日：2017-11-21
发明人： Ketan N. KURANI , Rab Mukraj , Michael J. Strein
IPC分类号： H04L7/04
摘要： A technique for synchronizing time in a machine-based system. The technique includes receiving time reference information for a first operational element included in the system; analyzing the time reference information against a known correct timing state for the first operational element; determining that the first operational element is not properly synchronized based on the time reference information and the known correct timing state; and in response to determining that the first operational element is not properly synchronized, causing a fault indicator associated with the first operational element to be displayed on a machine that monitors a plurality of operational elements included in the system.
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94.发明申请公开(公告)号：US20190158100A1
公开(公告)日：2019-05-23
申请号：US16150347
申请日：2018-10-03
发明人： JUNG-PIL LIM , KYUNG-HO RYU , JAE-SUK YU , JAE-YOUL LEE , DONG-MYUNG LEE , HYUN-WOOK LIM
CPC分类号： H03L7/0814 , H03L7/0807 , H04L7/044
摘要： A method of recovering a clock and data from an input data signal including an embedded clock, the method including generating a recovery clock signal from the input data signal based on a first window signal; detecting a unit interval corresponding to one bit of the input data signal based on the recovery clock signal; delaying a signal synchronized with the recovery clock signal based on the unit interval; and generating the first window signal based on the delayed signal.
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公开(公告)号：US10264540B2
公开(公告)日：2019-04-16
申请号：US15726011
申请日：2017-10-05
发明人： Rui Yu , Xuesong Chen , Theng Tee Yeo , Lee Guek Doreen Yeo
摘要： A near field communication (NFC) device configured to use in preparing a carrier signal for active load modulation supporting both synchronous and asynchronous transmissions. The NFC device comprises a local clock generator for generating a reference clock signal (REF_CLK), a clock extractor for recovering a clock signal (EXT_CLK) generated by an NFC initiator device, a frequency tracking module (FTM) for performing a frequency tracking operation based on an input clock signal (REF_CLK or EXT_CLK) to produce a FTM output with its frequency aligned with the input clock signal, and a phase tracking module (PTM) for performing a phase tracking operation on the FTM output based on EXT_CLK to produce a PTM output with its phase aligned with EXT_CLK.
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公开(公告)号：US10263720B2
公开(公告)日：2019-04-16
申请号：US14915609
申请日：2014-09-11
摘要： Embodiments of the present invention provide a mobile device comprising a slave clock, a receiver unit for receiving one or more frames from a remote device including a master system clock, a transmitter unit for transmitting one or more frames to the remote device, and a clock error correction unit. The clock error correction unit is configured to maintain clock synchronization between the slave clock and the master system clock, and maintain frame alignment for frames transmitted from the transmitter unit.
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公开(公告)号：US20190103875A1
公开(公告)日：2019-04-04
申请号：US15719973
申请日：2017-09-29
申请人： Cavium, LLC
发明人： Ethan Crain , Lu Wang
摘要： A data recovery circuit provides compensation for baseline wander exhibited by a data signal. An adaptive equalizer generates a recovered data signal from a data input. A level shifter and low-pass filter provide a compensation signal as a function of the recovered data signal. An adaptation engine adjusts the level of the compensation signal to compensate for baseline wander. The adaptive equalizer generates the recovered data signal as a function of the data input and the compensation signal, thereby providing accurate recovery of the data signal.
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公开(公告)号：US10236891B1
公开(公告)日：2019-03-19
申请号：US15863422
申请日：2018-01-05
申请人： Synopsys, Inc.
摘要： A lock time measurement system to determine a lock time includes a measurement device, a serializer-deserializer (SERDES), a pattern generator, and a splitter. In a first mode, the SERDES receives first data from the pattern generator by way of the splitter. A receiver of the SERDES outputs a recovered clock signal based on the first data to a transmitter. The transmitter includes a serializer and a multiplexer. The serializer receives the recovered clock signal by way of the multiplexer and modifies second data based on the recovered clock signal and outputs serial data. A measurement device, connected to the transmitter and the splitter determines the lock time. In a second mode, the SERDES functions as a transmitter for transmitting data and a receiver for receiving data in a communication link. The system has a better accuracy and utilizes existing receiver and driver circuits.
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公开(公告)号：US20190081828A1
公开(公告)日：2019-03-14
申请号：US16128884
申请日：2018-09-12
发明人： BIXING YE , ZUOHUI PENG , CHAOMING LI , QIN ZHANG , ZHILIN WU
IPC分类号： H04L25/493 , H04L7/04
摘要： Disclosed is a baud rate tracking and compensation apparatus comprising: a clock generating component generating a clock; a sampling circuit sampling a reception signal according to the clock and thereby generating a sampled result, and the sampling circuit generating a transition notification signal when the sampled result indicates a transition of the reception signal; a clock counting circuit counting cycles of the clock between a first transition of the reception signal and a second transition of the reception signal according to the clock and the transition notification signal; a bit counting circuit counting bit(s) between the first transition and the second transition according to the clock and a bit cycle; and a calculation circuit dividing the number of the cycles by the number of the bit(s) to obtain a calculation value, and then updating the bit cycle according to the calculation value.
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公开(公告)号：US10218493B2
公开(公告)日：2019-02-26
申请号：US15443495
申请日：2017-02-27
申请人： Itron, Inc.
摘要： In a radio using a plurality of channels defined in a radio frequency (RF) spectrum, a rate of false packet detections may be calculated for each of the plurality of channels using a plurality of respective correlation thresholds. The rate of false packet detections for each channel may be compared to a range of acceptable rates of false packet detections. The same or different ranges of acceptable rates of false packet detections may be used for each channel or each channel plan. Different correlation thresholds may be adjusted based at least in part on the comparisons. For example, if a rate of false packet detections exceeds a range of acceptable rates of false packet detections, the correlation threshold may be raised, or the reverse. A packet may be detected on different channels based on different adjusted correlation thresholds.
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