公开(公告)号：US09401118B2

公开(公告)日：2016-07-26

申请号：US12604692

申请日：2009-10-23

Applicant: Sung-Man Kim ,  Hong-Woo Lee ,  Jong-Hwan Lee ,  Hyeon-Hwan Kim ,  Jong-Hyuk Lee

Inventor： Sung-Man Kim ,  Hong-Woo Lee ,  Jong-Hwan Lee ,  Hyeon-Hwan Kim ,  Jong-Hyuk Lee

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/3614 ,  G09G3/3648 ,  G09G3/3677 ,  G09G3/3696 ,  G09G2300/0426 ,  G09G2300/0443 ,  G09G2300/0465 ,  G09G2300/0809 ,  G09G2310/0202 ,  G09G2320/0233 ,  G09G2320/0247 ,  G09G2320/0666

Abstract: A display apparatus includes: a plurality of pixel blocks, each pixel block of the plurality of pixel blocks including a first pixel electrode connected to a first switching element and a second pixel electrode connected to a second switching element; gate lines which extend along a first direction and include a first gate line connected to the first switching element and a second gate line connected to the second switching element; and data lines which extend along a second direction intersecting the first direction. A gate voltage is applied to the first gate line before the second gate line, and the first pixel electrode of each of the pixel blocks displays a same color.

Abstract translation: 显示装置包括：多个像素块，所述多个像素块中的每个像素块包括连接到第一开关元件的第一像素电极和连接到第二开关元件的第二像素电极; 栅极线，沿着第一方向延伸并且包括连接到第一开关元件的第一栅极线和连接到第二开关元件的第二栅极线; 以及沿着与第一方向相交的第二方向延伸的数据线。 栅极电压施加到第二栅极线之前的第一栅极线，并且每个像素块的第一像素电极显示相同的颜色。

公开(公告)号：US08810498B2

公开(公告)日：2014-08-19

申请号：US12898090

申请日：2010-10-05

Applicant: Sungman Kim ,  Beomjun Kim ,  Bong-Jun Lee ,  Hong-Woo Lee ,  Jae-seung Kim ,  Byung-Su Oh

Inventor： Sungman Kim ,  Beomjun Kim ,  Bong-Jun Lee ,  Hong-Woo Lee ,  Jae-seung Kim ,  Byung-Su Oh

IPC: G09G3/36 ,  G11C19/00

CPC classification number: G09G3/3677

Abstract: A gate driving circuit includes a plurality of stages which are connected to each other one after another and each stage of the plurality of stages outputs a gate voltage to a corresponding gate line of a plurality of gate lines in response to at least one clock signal. Each stage of the plurality of stages includes; a voltage output part which outputs the gate voltage, an output driving part which drives the voltage output part, a holding part which holds the gate line at an off-voltage, and a discharge part arranged at a first end of the gate line to discharge the gate line to the off-voltage in response to the gate voltage output from the voltage output part.

Abstract translation: 栅极驱动电路包括多个级彼此连接并且多级的每一级响应于至少一个时钟信号而将栅极电压输出到多条栅极线的对应栅极线。 多个阶段的每个阶段包括： 输出栅极电压的电压输出部分，驱动电压输出部分的输出驱动部分，将栅极线保持在截止电压的保持部分和布置在栅极线的第一端以放电的放电部分 栅极线响应于从电压输出部分输出的栅极电压而断开电压。

公开(公告)号：US08619070B2

公开(公告)日：2013-12-31

申请号：US12970787

申请日：2010-12-16

Applicant: Hong-Woo Lee ,  Eung-Gyu Lee ,  Jong-Hwan Lee ,  Sung-Man Kim

Inventor： Hong-Woo Lee ,  Eung-Gyu Lee ,  Jong-Hwan Lee ,  Sung-Man Kim

IPC: G09G5/00

CPC classification number: G09G3/3677 ,  G09G2310/0286 ,  G09G2340/0492

Abstract: An n-th stage (wherein, n is an integer) of the stages of a gate driving circuit includes a pull-up part, a first variable mode part and a second variable mode part. At least one of the first and second variable mode parts includes a variable element. The variable element comprises a first thin-film transistor (TFT) turned on in response to a first level voltage of the first or second direction signal, a second TFT applying the first or second direction signal to a control part of the pull-up part in response to an output signal of a previous stage or an output signal of a next stage, and a third TFT connected to the second TFT through the first TFT.

Abstract translation: 栅极驱动电路的级的第n级（其中，n是整数）包括上拉部分，第一可变模式部分和第二可变模式部分。 第一和第二可变模式部件中的至少一个包括可变元件。 可变元件包括响应于第一或第二方向信号的第一电平电压而导通的第一薄膜晶体管（TFT），将第一或第二方向信号施加到上拉部分的控制部分的第二TFT 响应于前一级的输出信号或下一级的输出信号，以及通过第一TFT连接到第二TFT的第三TFT。

公开(公告)号：US08503765B2

公开(公告)日：2013-08-06

申请号：US13636998

申请日：2011-04-08

Applicant: Dae Sic Woo ,  Byoung Ki Jeon ,  A Ran Kim ,  Hong Woo Lee ,  Jong Dae Kim ,  Won Suk Chung

Inventor： Dae Sic Woo ,  Byoung Ki Jeon ,  A Ran Kim ,  Hong Woo Lee ,  Jong Dae Kim ,  Won Suk Chung

IPC: G06K9/00

CPC classification number: G06T5/005 ,  H04N13/111 ,  H04N13/128

Abstract: An embodiment of the present invention relates to a method and apparatus for correcting errors in stereo images. The apparatus for correcting errors in stereo images according to an embodiment of the present invention comprises: a space histogram generation unit generating space histogram information using the depth map information on the input image data; a peak frequency generation unit generating a peak frequency using the 2D image data of the input image data; an object analysis unit determining the error in each frame of the input image data on the basis of the space histogram and peak frequency; a depth map error correction unit correcting the depth map information to reduce the error; and a rendering processing unit generating left and right eye images, which are stereo images, by using the corrected depth map information.

Abstract translation: 本发明的实施例涉及用于校正立体图像中的错误的方法和装置。 根据本发明的实施例的用于校正立体图像中的误差的装置包括：空间直方图生成单元，使用关于输入图像数据的深度图信息生成空间直方图信息; 峰值频率生成单元，使用输入图像数据的2D图像数据生成峰值频率; 对象分析单元，基于空间直方图和峰值频率来确定输入图像数据的每帧中的误差; 深度图错误校正单元，校正深度图信息以减少误差; 以及通过使用校正的深度图信息来生成左眼图像和右眼图像的再现处理单元，其是立体图像。

公开(公告)号：US20130180633A1

公开(公告)日：2013-07-18

申请号：US13824504

申请日：2011-12-20

Applicant: Hong-Woo Lee ,  Jae-Hyun Kim ,  Hyoun-Young Lee ,  Yeon-Sik Kang

Inventor： Hong-Woo Lee ,  Jae-Hyun Kim ,  Hyoun-Young Lee ,  Yeon-Sik Kang

IPC: C21D8/00

CPC classification number: C21D8/005 ,  B21D22/208 ,  C21D1/673 ,  C21D9/0068 ,  C21D9/46 ,  C21D9/48 ,  C21D2211/008 ,  C21D2221/00 ,  C21D2221/01 ,  C21D2221/02

Abstract: A multi physical properties part used in automotive components required to be lightweight and provide collision safety, and a method of manufacturing a multi physical properties part, in which the multi physical properties part may be more economically and simply manufactured by using two or more separated die sets without using an additional heating device or treating a die surface. A method of manufacturing a multi physical properties part, which includes positioning a single heated formed article in two or more die sets, and then manufacturing a multi physical properties part including two or more regions having different physical properties by differing cooling conditions in the respective die set.

Abstract translation: 用于要求轻量化并提供碰撞安全性的汽车部件中的多物理特性部件以及制造多物理性能部件的方法，其中多物理性能部件可以通过使用两个或更多个分离的模具更经济地和简单地制造 不使用附加的加热装置或处理模具表面。 一种多物理性能部件的制造方法，其特征在于，将单个加热的成型体定位在两个以上的模具组中，然后通过各个模具中的不同的冷却条件制造包括具有不同物理性质的两个以上的区域的多个物理性质部件 组。

公开(公告)号：US20130113772A1

公开(公告)日：2013-05-09

申请号：US13429871

申请日：2012-03-26

Applicant: Shin Tack KANG ,  Kyung-Hee KIM ,  Beom Jun KIM ,  Sung Man KIM ,  Jong Hwan LEE ,  Hong Woo LEE ,  Hye Rhee HAN ,  Ji Hye HEO

Inventor： Shin Tack KANG ,  Kyung-Hee KIM ,  Beom Jun KIM ,  Sung Man KIM ,  Jong Hwan LEE ,  Hong Woo LEE ,  Hye Rhee HAN ,  Ji Hye HEO

IPC: G09G5/00

CPC classification number: G09G3/3674 ,  G09G3/20 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/0291 ,  G09G2320/045

Abstract: A display panel includes a gate driver connected to a gate line, where the gate driver includes a plurality of stages, where each of the stages includes at least one dual gate thin film transistor having a first control terminal and a second control terminal, and where each of the stages receives a clock signal, a first low voltage, a second low voltage, at least one transmission signal of previous stages, at least two transmission signals of subsequent stages and an output control signal from one of the stages to output a gate voltage including a gate-on voltage and a gate-off voltage.

Abstract translation: 显示面板包括连接到栅极线的栅极驱动器，其中栅极驱动器包括多个级，其中每个级包括至少一个双栅极薄膜晶体管，其具有第一控制端子和第二控制端子，并且其中 每个级接收时钟信号，第一低电压，第二低电压，先前级的至少一个传输信号，后续级的至少两个传输信号和来自一个级的输出控制信号以输出门 电压包括栅极导通电压和栅极截止电压。

公开(公告)号：US08306177B2

公开(公告)日：2012-11-06

申请号：US12575895

申请日：2009-10-08

Applicant: Hong-Woo Lee ,  Sung-Man Kim ,  Jong-Hyuk Lee ,  Jong-Hwan Lee ,  Hyeon-Hwan Kim ,  Sang-Moon Moh ,  Jeong-Il Kim ,  Yeon-Kyu Moon

Inventor： Hong-Woo Lee ,  Sung-Man Kim ,  Jong-Hyuk Lee ,  Jong-Hwan Lee ,  Hyeon-Hwan Kim ,  Sang-Moon Moh ,  Jeong-Il Kim ,  Yeon-Kyu Moon

IPC: G11C19/00

CPC classification number: G11C19/28 ,  G09G3/3677 ,  G09G2300/0408

Abstract: A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.

Abstract translation: 上拉驱动部分通过响应于前一级或垂直启动信号之一接收导通电压而将第一节点的信号保持在高电平。 上拉部分响应于第一节点的信号通过输出端子输出时钟信号。 当第一节点的信号分别为低或高时，第一保持部件将第二节点的信号保持在高电平或低电平。 第二保持部分响应于第二节点的信号或延迟和反相的时钟信号，将第一节点的信号和输出端的信号保持在接地电压。

公开(公告)号：US08223283B2

公开(公告)日：2012-07-17

申请号：US12332213

申请日：2008-12-10

Applicant: Bong-Jun Lee ,  Byeong-Jae Ahn ,  Yeo-Geon Yoon ,  Hong-Woo Lee ,  Hyuk-Jin Kim ,  Jong-Oh Kim ,  Gyu-Tae Kim

Inventor： Bong-Jun Lee ,  Byeong-Jae Ahn ,  Yeo-Geon Yoon ,  Hong-Woo Lee ,  Hyuk-Jin Kim ,  Jong-Oh Kim ,  Gyu-Tae Kim

IPC: G02F1/1343

CPC classification number: H01L27/124 ,  H01L27/1288

Abstract: A display substrate includes a base substrate, a first line, a second line, a bridge line, a thin-film transistor (TFT), a storage line, and a pixel electrode. The first line extends in a first direction on the base substrate. The second line extends in a second direction on the base substrate and is divided into two portions with respect to the first line. The bridge line makes contact with the two portions of the second line in first and second bridge contact regions. The TFT includes a source electrode making contact with one of the first and second lines in a data contact region. The storage line is formed on the one of the first and second lines. The pixel electrode is formed on the storage line and is electrically connected to the TFT. The display substrate reduces formation of parasitic capacitance between pixel electrode and data line.

Abstract translation: 显示基板包括基底基板，第一线，第二线，桥接线，薄膜晶体管（TFT），存储线和像素电极。 第一线在基底基板上沿第一方向延伸。 第二线在基底基板上沿第二方向延伸，并且相对于第一线分成两部分。 桥接线与第一和第二桥接触区域中的第二线路的两个部分接触。 TFT包括与数据接触区域中的第一和第二线路之一接触的源电极。 存储线形成在第一和第二线之一上。 像素电极形成在存储线上并与TFT电连接。 显示基板减少像素电极和数据线之间的寄生电容的形成。

公开(公告)号：US08203682B2

公开(公告)日：2012-06-19

申请号：US12181678

申请日：2008-07-29

Applicant: Hong-Woo Lee ,  Jong-Oh Kim ,  Sung-Man Kim ,  Sun-Kyu Joo ,  Bong-Jun Lee ,  Jae-Min Shin

Inventor： Hong-Woo Lee ,  Jong-Oh Kim ,  Sung-Man Kim ,  Sun-Kyu Joo ,  Bong-Jun Lee ,  Jae-Min Shin

IPC: G02F1/1343

CPC classification number: G02F1/136213

Abstract: A display substrate includes a first switching element, a second switching element, a first pixel electrode, a second pixel electrode, a main storage electrode and a sub-storage electrode. The first switching element is connected to a data line and a first gate line. The second switching element is connected to the data line and a second gate line adjacent to the first gate line. The first pixel electrode is electrically connected to the first switching element. The second pixel electrode is electrically connected to the second switching element. The main storage electrode is disposed in an area between the first pixel electrode and the second electrode to overlap with first ends of the first and second pixel electrodes. The sub-storage electrode is spaced apart from the first and second gate lines.

Abstract translation: 显示基板包括第一开关元件，第二开关元件，第一像素电极，第二像素电极，主存储电极和副存储电极。 第一开关元件连接到数据线和第一栅极线。 第二开关元件连接到数据线和与第一栅极线相邻的第二栅极线。 第一像素电极电连接到第一开关元件。 第二像素电极电连接到第二开关元件。 主存储电极设置在第一像素电极和第二电极之间的区域中，以与第一和第二像素电极的第一端重叠。 副存储电极与第一和第二栅极线间隔开。

公开(公告)号：US08174478B2

公开(公告)日：2012-05-08

申请号：US11760174

申请日：2007-06-08

Applicant: Sung-Man Kim ,  Hong-Woo Lee ,  Byeong-Jae Ahn ,  Young-Geol Song ,  Bong-Jun Lee ,  Yeon-Kyu Moon ,  Kyung-Wook Kim ,  Jin-Suk Seo

Inventor： Sung-Man Kim ,  Hong-Woo Lee ,  Byeong-Jae Ahn ,  Young-Geol Song ,  Bong-Jun Lee ,  Yeon-Kyu Moon ,  Kyung-Wook Kim ,  Jin-Suk Seo

IPC: G09G3/36 ,  G11C19/00

CPC classification number: G11C19/184 ,  G09G3/3674 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2320/041

Abstract: A gate driving circuit and a display apparatus having the gate driving circuit include a pull-up part and a carry part pull up a present gate signal and a present carry signal, respectively, to a first clock during a first period within one frame. A pull-down part receives a next gate signal to discharge the present gate signal to a source power voltage. A pull-up driving part is connected to control terminals of the carry part and pull-up part (Q-node) to turn the carry part and pull-up part on and off. A floating preventing part prevents an output terminal of the carry part from being floated in response to the first clock during a second period within the one frame.

Abstract translation: 具有栅极驱动电路的栅极驱动电路和显示装置包括上拉部分和进位部分，分别在一帧内的第一时段期间将当前栅极信号和当前进位信号上拉到第一时钟。 下拉部分接收下一个栅极信号，以将当前栅极信号放电到源极电压。 上拉驱动部分连接到进位部分和上拉部分（Q-节点）的控制端子，以使进位部分和上拉部分打开和关闭。 浮动防止部件在一帧内的第二时段期间，响应于第一时钟防止进位部分的输出端子浮起。