公开(公告)号：US08423873B2

公开(公告)日：2013-04-16

申请号：US12787120

申请日：2010-05-25

申请人： Shaohua Yang ,  Richard Leo Galbraith ,  Ksenija Lakovic ,  Yuan Xing Lee ,  Travis Oenning ,  Jongseung Park ,  Hideki Sawaguchi ,  Bruce A. Wilson

发明人： Shaohua Yang ,  Richard Leo Galbraith ,  Ksenija Lakovic ,  Yuan Xing Lee ,  Travis Oenning ,  Jongseung Park ,  Hideki Sawaguchi ,  Bruce A. Wilson

IPC分类号： H03M13/00

CPC分类号： H03M13/45 ,  G11B20/1833 ,  G11B2020/1863 ,  G11B2220/2516 ,  H03M13/098 ,  H03M13/1102 ,  H03M13/1515 ,  H03M13/152 ,  H03M13/256 ,  H03M13/2906 ,  H03M13/2909 ,  H03M13/2945 ,  H03M13/2957 ,  H03M13/3784 ,  H03M13/4146 ,  H03M13/6343

摘要： Two levels of error correction decoding are performed using first and second level decoders. A composite code formed by combining an inner component code and an outer component code can be used to decode the data and correct any errors. Performing two level decoding using a composite code allows the size of the inner parity block to be reduced to a single Reed-Solomon symbol while keeping a good code rate. The first level decoder generates soft information. The soft information can indicate a most likely error event for each possible syndrome value of the inner component code. The soft information can also include error metric values for each of the most likely error events. The second level decoder generates corrected syndrome values based on the soft information using the outer component code. The most likely trellis path that corresponds to the corrected syndrome values is then selected.

摘要翻译： 使用第一和第二级解码器执行两级纠错解码。 可以使用通过组合内部组件代码和外部组件代码形成的组合代码来解码数据并纠正任何错误。 使用复合代码执行两级解码允许内部奇偶校验块的大小减少到单个Reed-Solomon符号，同时保持良好的代码率。 第一级解码器产生软信息。 软信息可以指示内部组件代码的每个可能的综合征值的最可能的错误事件。 软信息还可以包括每个最可能的错误事件的误差度量值。 第二级解码器使用外部分量代码基于软信息生成校正的校正子值。 然后选择对应于校正的综合征值的最可能的网格路径。

公开(公告)号：US08341506B2

公开(公告)日：2012-12-25

申请号：US11694676

申请日：2007-03-30

申请人： Zongwang Li ,  Yuan Xing Lee ,  Richard Leo Galbraith ,  Ivana Djurdjevic ,  Travis Roger Oenning

发明人： Zongwang Li ,  Yuan Xing Lee ,  Richard Leo Galbraith ,  Ivana Djurdjevic ,  Travis Roger Oenning

IPC分类号： H03M13/00 ,  H03M13/03

CPC分类号： H03M13/112 ,  H03M13/1102 ,  H03M13/1117 ,  H03M13/1128 ,  H03M13/1515 ,  H03M13/2966 ,  H03M13/2975 ,  H03M13/2987 ,  H03M13/6331 ,  H03M13/658 ,  H04L1/005 ,  H04L1/0057

摘要： Techniques are provided for iteratively decoding data recorded on a data storage device. An iterative decoder decodes the data using multiple decoding iterations to correct errors. In multiple iterations of the iterative decoder, a post processing block generates soft information, and a decoder applies a minimum sum decoding algorithm to a low density parity check (LDPC) code to generate extrinsic information based on the soft information and updated soft information.

摘要翻译： 提供了用于迭代地解码记录在数据存储设备上的数据的技术。 迭代解码器使用多个解码迭代来解码数据以校正错误。 在迭代解码器的多次迭代中，后处理块产生软信息，并且解码器将最小和解码算法应用于低密度奇偶校验（LDPC）码，以基于软信息和更新的软信息生成外在信息。

公开(公告)号：US08205123B2

公开(公告)日：2012-06-19

申请号：US12315601

申请日：2008-12-04

申请人： Shaohua Yang ,  Changyou Xu ,  Weijun Tan ,  Ching-Fu Wu ,  Yuan Xing Lee

发明人： Shaohua Yang ,  Changyou Xu ,  Weijun Tan ,  Ching-Fu Wu ,  Yuan Xing Lee

IPC分类号： H03M13/27

CPC分类号： G06F12/0207 ,  H04L1/005 ,  H04L1/0057 ,  H04L1/0065

摘要： In exemplary embodiments, a skewed interleaving function for iterative code systems is described. The skewed interleaving function provides a skewed row and column memory partition and a layered structure for re-arranging data samples read from, for example, a first channel detector. An iterative decoder, such as an iterative decoder based on a low-density parity-check code (LDPC), might employ an element to de-skew the data from the interleaved memory partition before performing iterative decoding of the data, and then re-skew the information before passing decoded samples to the de-interleaver. The de-interleaver re-arranges the iterative decoded data samples in accordance with an inverse of the interleaver function before passing the decoded data samples to, for example, a second channel detector.

摘要翻译： 在示例性实施例中，描述了用于迭代代码系统的偏斜交错功能。 倾斜交错功能提供了一个倾斜的行和列存储器分区以及用于重新排列从例如第一通道检测器读取的数据样本的分层结构。 诸如基于低密度奇偶校验码（LDPC）的迭代解码器的迭代解码器可以在执行数据的迭代解码之前采用去除来自交错存储器分区的数据的元素， 在将解码的样本传递到解交织器之前，将信息偏移。 解交织器在将解码的数据样本传递到例如第二信道检测器之前，根据交织器功能的反向重新排列迭代解码的数据样本。

公开(公告)号：US08037394B2

公开(公告)日：2011-10-11

申请号：US11771783

申请日：2007-06-29

申请人： Ivana Djurdjevic ,  Bruce Alexander Wilson ,  Mario Blaum ,  Richard Leo Galbraith ,  Ksenija Lakovic ,  Yuan Xing Lee ,  Zongwang Li ,  Travis Roger Oenning

发明人： Ivana Djurdjevic ,  Bruce Alexander Wilson ,  Mario Blaum ,  Richard Leo Galbraith ,  Ksenija Lakovic ,  Yuan Xing Lee ,  Zongwang Li ,  Travis Roger Oenning

IPC分类号： H03M13/45

CPC分类号： G11B20/1833 ,  G11B20/10046 ,  G11B2020/185 ,  G11B2020/1863 ,  H03M13/1102 ,  H03M13/2957 ,  H03M13/6343

摘要： Techniques are provided that generate bit reliabilities for a detected sequence. A detector generates the detected sequence. According to one embodiment, a post-processor finds a first set of combinations of one or more error events in the detected sequence satisfying a complete set or a subset of error correction constraints corresponding to the first bit value, finds a second set of combinations of one or more error events in the detected sequence satisfying a complete set or a subset of error correction constraints corresponding to the second bit value, selects a first most likely combination of one or more events of the first set and a second most likely combination of one or more events of the second set, and generates a bit reliability based on the first and the second most likely values.

摘要翻译： 提供了为检测到的序列生成位可靠性的技术。 检测器产生检测到的序列。 根据一个实施例，后处理器在检测到的序列中找到一个或多个错误事件的组合的第一组，其满足对应于第一位值的完整集合或纠错约束的子集，找到第二组组合 检测到的序列中的一个或多个错误事件满足对应于第二位值的完整集合或纠错约束的子集，选择第一集合中的一个或多个事件的第一最有可能的组合和第一集合的第二最有可能的组合 或更多的事件，并且基于第一和第二最有可能的值产生位可靠性。

公开(公告)号：US08037393B2

公开(公告)日：2011-10-11

申请号：US11771226

申请日：2007-06-29

申请人： Ivana Djurdjevic ,  Richard Leo Galbraith ,  Bruce Alexander Wilson ,  Yuan Xing Lee ,  Travis Roger Oenning ,  Mario Blaum ,  Ksenija Lakovic ,  Zongwang Li

发明人： Ivana Djurdjevic ,  Richard Leo Galbraith ,  Bruce Alexander Wilson ,  Yuan Xing Lee ,  Travis Roger Oenning ,  Mario Blaum ,  Ksenija Lakovic ,  Zongwang Li

IPC分类号： H03M13/45

CPC分类号： H03M13/45 ,  H03M13/11 ,  H03M13/41 ,  H03M13/43 ,  H03M13/6575 ,  H04L1/005

摘要： A detector generates a detected sequence, and a post processor generates probability values that indicate the likelihood of a plurality of error events in the detected sequence. The post processor partitions the values into first and second subsets. The post processor selects a first most likely value from the first subset of the values and a second most likely value from the second subset of the values. The post processor generates a bit reliability based on the first and the second most likely values.

摘要翻译： 检测器产生检测到的序列，并且后处理器产生指示检测到的序列中的多个错误事件的可能性的概率值。 后处理器将值分为第一和第二子集。 后处理器从值的第一子集中选择第一最可能的值，并从值的第二子集中选择第二最有可能的值。 后处理器基于第一和第二最可能的值产生位可靠性。

公开(公告)号：US20100275096A1

公开(公告)日：2010-10-28

申请号：US12430927

申请日：2009-04-28

申请人： Hao Zhong ,  Shaohua Yang ,  Weijun Tan ,  Changyou Xu ,  Yuan Xing Lee

发明人： Hao Zhong ,  Shaohua Yang ,  Weijun Tan ,  Changyou Xu ,  Yuan Xing Lee

IPC分类号： H03M13/00 ,  G06F11/00

CPC分类号： H03M13/1111 ,  H03M13/1108 ,  H03M13/1128 ,  H03M13/3715 ,  H03M13/6331

摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a processing loop circuit having a data detector and a soft decision decoder. The data detector provides a detected output, and the soft decision decoder applies a soft decoding algorithm to a derivative of the detected output to yield a soft decision output and a first hard decision output. The systems further include a queuing buffer and a hard decision decoder. The queuing buffer is operable to store the soft decision output, and the hard decision decoder accesses the soft decision output and applies a hard decoding algorithm to yield a second hard decision output. The data detector is operable to perform a data detection on a derivative of the soft decision output if the soft decision decoder and the hard decision decoder fail to converge

摘要翻译： 本发明的各种实施例提供了用于数据处理的系统和方法。 例如，公开了一种包括具有数据检测器和软判决解码器的处理环路电路的数据处理系统。 数据检测器提供检测输出，软判决解码器将软解码算法应用于检测输出的导数，以产生软决策输出和第一硬决策输出。 该系统还包括排队缓冲器和硬判决解码器。 排队缓冲器可操作以存储软判决输出，并且硬判决解码器访问软决策输出并应用硬解码算法以产生第二硬决策输出。 如果软判决解码器和硬判决解码器不能收敛，则数据检测器可操作以对软决策输出的导数执行数据检测

公开(公告)号：US07590920B2

公开(公告)日：2009-09-15

申请号：US11198943

申请日：2005-08-05

申请人： Shaohua Yang ,  Mario Blaum ,  Richard Leo Galbraith ,  Ksenija Lakovic ,  Yuan Xing Lee ,  Travis Oenning ,  Jongseung Park ,  Hideki Sawaguchi

发明人： Shaohua Yang ,  Mario Blaum ,  Richard Leo Galbraith ,  Ksenija Lakovic ,  Yuan Xing Lee ,  Travis Oenning ,  Jongseung Park ,  Hideki Sawaguchi

IPC分类号： H03M13/00

CPC分类号： H03M13/29 ,  H03M13/1515 ,  H03M13/152 ,  H03M13/2903 ,  H03M13/2906

摘要： An error correction encoder inserts redundant parity information into a data stream to improve system reliability. The encoder can generate the redundant parity information using a composite code. Dummy bits are inserted into the data stream in locations reserved for parity information generated by subsequent encoding. The error correction code can have a uniform or a non-uniform span. The span corresponds to consecutive channel bits that are within a single block of a smaller parity code that is used to form a composite code. The span lengths can be variant across the whole codeword by inserting dummy bits in less than all of the spans.

摘要翻译： 纠错编码器将冗余奇偶校验信息插入到数据流中，以提高系统的可靠性。 编码器可以使用复合代码生成冗余奇偶校验信息。 在由后续编码生成的奇偶校验信息保留的位置中将虚拟位插入到数据流中。 纠错码可以具有均匀或不均匀的间距。 该跨度对应于用于形成复合代码的较小奇偶码的单个块内的连续通道位。 跨越整个码字的跨度长度可以通过在少于所有跨度的位置插入虚拟位而变化。

公开(公告)号：US07530003B2

公开(公告)日：2009-05-05

申请号：US11061063

申请日：2005-02-17

申请人： Yuan Xing Lee ,  Morishi Izumita

发明人： Yuan Xing Lee ,  Morishi Izumita

IPC分类号： G11C29/00

CPC分类号： H03M13/27 ,  H03M13/15 ,  H03M13/1515 ,  H03M13/31 ,  H03M13/6343

摘要： Embodiments of the present invention provide techniques for generating MTR codes with ECC without the use of a second MTR code, while still satisfying the specified constraint. In one embodiment, a system for processing data comprises a maximum transition run or timing-varying maximum transition run (hereinafter MTR) encoder configured to encode input data sequence from a hard disk controller into an MTR coded sequence which satisfies a j-constraint; an error correction code (ECC) encoder configured to generate ECC check bits for the MTR coded sequence; and a bit-level interleaving and substitution module configured to interleave the generated ECC check bits into the MTR coded sequence by stuffing the generated ECC check bits at boundaries of MTR coded blocks of the MTR coded sequence, to determine if a violation of the j-constraint has occurred at the boundaries of the MTR coded blocks, and to perform substitution of bits at a boundary of the MTR coded blocks to maintain the j-constraint if a violation of the j-constraint has occurred.

摘要翻译： 本发明的实施例提供了在不使用第二MTR码的情况下生成具有ECC的MTR码的技术，同时仍然满足指定的约束。 在一个实施例中，用于处理数据的系统包括最大转换运行或定时变化最大转换运行（以下称为MTR）编码器，其被配置为将来自硬盘控制器的输入数据序列编码为满足j约束的MTR编码序列; 纠错码（ECC）编码器，被配置为产生用于MTR编码序列的ECC校验位; 以及位级交织和替换模块，被配置为通过在MTR编码序列的MTR编码块的边界处填充所生成的ECC校验位来将生成的ECC校验位交织到MTR编码序列中，以确定是否违反j- 在MTR编码块的边界处发生约束，并且如果已经发生违反j约束，则在MTR编码块的边界处执行位的替换以维持j约束。

公开(公告)号：US07424074B2

公开(公告)日：2008-09-09

申请号：US11110187

申请日：2005-04-19

申请人： Yuan Xing Lee ,  Richard Leo Galbraith ,  Travis Oenning ,  Weldon Hanson

发明人： Yuan Xing Lee ,  Richard Leo Galbraith ,  Travis Oenning ,  Weldon Hanson

IPC分类号： H04B1/10

CPC分类号： G11B20/24 ,  G11B20/10009 ,  G11B20/10046

摘要： Embodiments of the invention provide techniques for optimizing the detector target polynomials in read/write channels to achieve the best error rate performance in recording devices. In one embodiment, a method of obtaining a detector target polynomial of a read/write channel to achieve best error rate performance in a recording device comprises: providing an initial detector target for the read/write channel; measuring a noise autocorrelation of the read/write channel at the output of equalizer using channel hardware; computing a noise autocorrelation at the output of the 1st stage target based on the measured noise autocorrelation of the read/write channel at the output of equalizer; calculating optimal coefficients for the noise whitening filter; and obtaining the optimal detector target polynomial of the read/write channel using the calculated coefficients for noise whitening filter.

摘要翻译： 本发明的实施例提供了用于优化读/写通道中的检测器目标多项式以在记录装置中实现最佳误码率性能的技术。 在一个实施例中，获得读/写通道的检测器目标多项式以在记录装置中实现最佳误码率性能的方法包括：为读/写通道提供初始检测器目标; 使用信道硬件测量均衡器输出处的读/写通道的噪声自相关; 基于在均衡器的输出处的读/写通道的测量的噪声自相关来计算第1阶段目标的输出处的噪声自相关; 计算噪声增白滤波器的最优系数; 并使用所计算的噪声增白滤波器的系数来获得读/写信道的最佳检测器目标多项式。

公开(公告)号：US20060235919A1

公开(公告)日：2006-10-19

申请号：US11110187

申请日：2005-04-19

申请人： Yuan Xing Lee ,  Richard Galbraith ,  Travis Oenning ,  Weldon Hanson

发明人： Yuan Xing Lee ,  Richard Galbraith ,  Travis Oenning ,  Weldon Hanson

IPC分类号： G06F17/15

CPC分类号： G11B20/24 ,  G11B20/10009 ,  G11B20/10046

摘要： Embodiments of the invention provide techniques for optimizing the detector target polynomials in read/write channels to achieve the best error rate performance in recording devices. In one embodiment, a method of obtaining a detector target polynomial of a read/write channel to achieve best error rate performance in a recording device comprises: providing an initial detector target for the read/write channel; measuring a noise autocorrelation of the read/write channel at the output of equalizer using channel hardware; computing a noise autocorrelation at the output of the 1st stage target based on the measured noise autocorrelation of the read/write channel at the output of equalizer; calculating optimal coefficients for the noise whitening filter; and obtaining the optimal detector target polynomial of the read/write channel using the calculated coefficients for noise whitening filter.

摘要翻译： 本发明的实施例提供了用于优化读/写通道中的检测器目标多项式以在记录装置中实现最佳误码率性能的技术。 在一个实施例中，获得读/写通道的检测器目标多项式以在记录装置中实现最佳误码率性能的方法包括：为读/写通道提供初始检测器目标; 使用信道硬件测量均衡器输出处的读/写通道的噪声自相关; 基于在均衡器的输出处的读/写通道的测量的噪声自相关来计算第1阶段目标的输出处的噪声自相关; 计算噪声增白滤波器的最优系数; 并使用所计算的噪声增白滤波器的系数来获得读/写信道的最佳检测器目标多项式。