公开(公告)号：US20120049953A1

公开(公告)日：2012-03-01

申请号：US13188024

申请日：2011-07-21

申请人： Nadim Khlat

发明人： Nadim Khlat

IPC分类号： H03G3/20

CPC分类号： H03F1/0227 ,  H03F1/0244

摘要： A power management system for a radio frequency (RF) power amplifier (PA) load is disclosed. The power management system includes a first switching power supply that is adapted to output a relatively constant voltage, an electronic switch for selectively coupling the first switching power supply to the RF PA load, and a second switching power that is adapted to output a dynamic DC voltage to the RF PA load. The power management system further includes a control system that is adapted to close the electronic switch to supply the relatively constant DC voltage in addition to the dynamic DC voltage to the RF PA load in a first mode and to open the electronic switch wherein the relatively constant DC voltage is not supplied to the RF PA load in a second mode.

摘要翻译： 公开了一种用于射频（RF）功率放大器（PA）负载的电源管理系统。 电源管理系统包括适于输出相对恒定电压的第一开关电源，用于将第一开关电源选择性地耦合到RF PA负载的电子开关，以及适于输出动态DC的第二开关电源 电压到RF PA负载。 电力管理系统还包括控制系统，其适于关闭电子开关以在第一模式中向RF PA负载提供除了动态DC电压之外的相对恒定的DC电压，并且打开电子开关，其中相对恒定 在第二模式下，不向RF PA负载提供直流电压。

公开(公告)号：US08068573B1

公开(公告)日：2011-11-29

申请号：US11740967

申请日：2007-04-27

申请人： Nadim Khlat ,  Richard A. Summe ,  Scott Robert Humphreys ,  Chris Ngo

发明人： Nadim Khlat ,  Richard A. Summe ,  Scott Robert Humphreys ,  Chris Ngo

IPC分类号： H04L7/00 ,  H03L7/00

CPC分类号： H03K3/84 ,  H03K7/04 ,  H04B15/06

摘要： The present invention is a phase dithered digital communications system that includes a digital receiver, and uses phase dithering to spread the energy of one or more system clocks to minimize receiver de-sensitization. Phase dithering uses a single frequency for each system clock; however, the energy of each system clock is spread over a range of frequencies by changing the duty-cycle of each clock half-cycle. A non-phase dithered clock drives the sampling clock of a receiver analog-to-digital converter to provide accurate correlation with received information, which may allow use of a higher frequency sampling clock than in frequency dithered designs. Phase dithered clocks and non-phase dithered clocks may have constant frequencies that are related to each other by a ratio of two integers; therefore, the time base used for extracting received data is always correlated and accurate.

摘要翻译： 本发明是一种相位抖动数字通信系统，其包括数字接收机，并且使用相位抖动来扩展一个或多个系统时钟的能量以最小化接收机去敏感。 相位抖动对每个系统时钟使用单个频率; 然而，每个系统时钟的能量通过改变每个时钟半周期的占空比在一个频率范围内扩展。 非相抖动时钟驱动接收器模拟 - 数字转换器的采样时钟，以提供与接收信息的精确相关性，这可能允许使用比在频率抖动设计中更高频率的采样时钟。 相位抖动时钟和非相位抖动时钟可以具有通过两个整数的比率彼此相关的恒定频率; 因此，用于提取接收到的数据的时基总是相关和准确的。

公开(公告)号：US20110234335A1

公开(公告)日：2011-09-29

申请号：US12969867

申请日：2010-12-16

申请人： Nadim Khlat

发明人： Nadim Khlat

IPC分类号： H03H7/48

CPC分类号： H04B1/406

摘要： A user equipment (UE) front end (FE) that is adapted for multiband simultaneous transmission and reception is provided. The UE FE includes a first multi-filter device having a transmit (TX) band-pass filter adapted to pass a first TX signal band associated with a first radio access technology type, and a receive (RX) band-pass filter adapted to pass a second RX signal band associated with a second radio access technology type. The UE FE also includes a second multi-filter device having a TX band-pass filter adapted to pass a second TX signal band associated with the second radio access technology type and an RX band-pass filter adapted to pass the first RX signal band associated with the first radio access technology type. The first radio access technology type and the second radio access technology type are preferably long term evolution (LTE) and code division multiple access 2000 (CDMA2000), respectively, or vice versa.

摘要翻译： 提供了适用于多频带同时发送和接收的用户设备（UE）前端（FE）。 UE FE包括具有适于通过与第一无线电接入技术类型相关联的第一TX信号频带的发射（TX）带通滤波器的第一多滤波器设备和适于通过的接收（RX）带通滤波器 与第二无线电接入技术类型相关联的第二RX信号频带。 UE FE还包括具有适于通过与第二无线电接入技术类型相关联的第二TX信号频带的TX带通滤波器的第二多滤波器设备和适于通过相关联的第一RX信号带的RX带通滤波器 具有第一种无线电接入技术类型。 第一无线电接入技术类型和第二无线电接入技术类型优选地分别是长期演进（LTE）和码分多址2000（CDMA2000），反之亦然。

公开(公告)号：US07877060B1

公开(公告)日：2011-01-25

申请号：US11347957

申请日：2006-02-06

申请人： Nadim Khlat ,  Wael A. Al-Qaq ,  Dennis Mahoney ,  Paul D. Brey ,  Brian Baxter

发明人： Nadim Khlat ,  Wael A. Al-Qaq ,  Dennis Mahoney ,  Paul D. Brey ,  Brian Baxter

IPC分类号： H04B1/00

CPC分类号： H04B1/0475 ,  H03F1/3247 ,  H03F1/3282

摘要： A system and method are provided for calibrating Amplitude Modulation to Phase Modulation (AM/PM) pre-distortion in a transmitter operating according to a polar modulation scheme. In general, phase modulation is disabled during transmission of an actual polar modulation signal. As a result, the transmitter provides a radio frequency (RF) output signal having an amplitude modulation component and ideally a constant phase. However, the AM/PM distortion of the transmitter creates a phase modulation component in the RF output signal. The phase component of the RF output signal, which is the AM/PM distortion of the transmitter, is measured by test equipment. The AM/PM pre-distortion applied by the transmitter is then calibrated based on the measured AM/PM distortion such that the AM/PM distortion of the transmitter is substantially reduced.

摘要翻译： 提供了一种系统和方法，用于在根据极化调制方案工作的发射机中校准幅度调制到相位调制（AM / PM）预失真。 通常，在实际极性调制信号的传输期间禁止相位调制。 结果，发射机提供具有幅度调制分量的射频（RF）输出信号，并且理想地是恒定相位。 然而，发射机的AM / PM失真在RF输出信号中产生相位调制分量。 RF输出信号的相位分量，即发射机的AM / PM失真，由测试设备测量。 然后基于所测量的AM / PM失真校准由发射机施加的AM / PM预失真，使得发射机的AM / PM失真明显减少。

公开(公告)号：US07529523B1

公开(公告)日：2009-05-05

申请号：US11209435

申请日：2005-08-23

申请人： Jason Young ,  Dennis Mahoney ,  Ricke W. Clark ,  Nadim Khlat ,  Adam Toner

发明人： Jason Young ,  Dennis Mahoney ,  Ricke W. Clark ,  Nadim Khlat ,  Adam Toner

IPC分类号： H01Q11/12

CPC分类号： H01Q1/242 ,  H01Q3/28

摘要： A method for calibrating the output power of a mobile terminal using at least a second order curve fit to describe a power amplifier gain (PAG) setting versus output power characteristic of a power amplifier in a transmitter of the mobile terminal is provided. For each of an upper-band frequency, a mid-band frequency, and a lower-band frequency of a frequency band, multiple measurements of the output power of the mobile terminal are made corresponding to multiple values of the PAG setting, and a curve fit is performed, thereby calculating coefficients defining a polynomial describing the PAG setting versus output power characteristic. Using the polynomials describing the PAG setting versus output power characteristic of the power amplifier for each of the upper-band, mid-band, and lower-band frequencies, values of the PAG setting are determined for each desired output power level for each desired frequency within the frequency band.

摘要翻译： 提供了一种使用至少二阶曲线来校准移动终端的输出功率的方法，其适合于描述功率放大器增益（PAG）设置与移动终端的发射机中的功率放大器的输出功率特性。 对于频带的上带频率，中频带频率和低频带频率中的每一个，对应于PAG设置的多个值对移动终端的输出功率进行多次测量，并且曲线 执行拟合，由此计算定义描述PAG设置与输出功率特性的多项式的系数。 使用描述PAG设置的多项式与功率放大器对于每个高频带，中频带和低频带频率的输出功率特性，为每个期望频率的每个期望输出功率电平确定PAG设置的值 在频带内。

公开(公告)号：US07274748B1

公开(公告)日：2007-09-25

申请号：US10859718

申请日：2004-06-02

申请人： Nadim Khlat

发明人： Nadim Khlat

IPC分类号： H04L25/03

CPC分类号： H04L27/361 ,  H03F1/0222 ,  H03F1/3258 ,  H03F1/3288 ,  H03F3/19 ,  H03F3/24 ,  H03F2200/336 ,  H03F2200/504 ,  H04L25/03343

摘要： A transmitter for a mobile terminal including a polar modulator that compensates for amplitude to frequency distortion (AM to FM distortion) of a power amplifier in the transmit chain is provided. In general, the modulator includes a polar converter that converts an input signal into an amplitude signal and a phase signal. A phase to frequency converter converts the phase signal into a frequency signal. Based on the amplitude signal, compensation circuitry generates a frequency compensation signal that essentially cancels that AM to FM distortion of the power amplifier. A combiner combines the frequency signal and the frequency compensation signal, and the pre-distorted signal is converted into an analog frequency signal and amplified by the power amplifier. Accordingly, when the pre-distorted signal is amplified by the power amplifier, the frequency compensation signal essentially cancels the AM to FM distortion of the power amplifier.

摘要翻译： 提供一种用于移动终端的发射机，其包括用于补偿发射链中功率放大器的幅度与频率失真（AM至FM失真）的极坐标调制器。 通常，调制器包括极化转换器，其将输入信号转换成振幅信号和相位信号。 相变频器将相位信号转换成频率信号。 基于振幅信号，补偿电路产生基本上消除功率放大器的AM到FM失真的频率补偿信号。 组合器组合频率信号和频率补偿信号，并且预失真信号被转换成模拟频率信号并由功率放大器放大。 因此，当预失真信号被功率放大器放大时，频率补偿信号基本上消除功率放大器的AM到FM失真。

公开(公告)号：US20060192620A1

公开(公告)日：2006-08-31

申请号：US10537634

申请日：2003-11-27

申请人： Hugues Beaulaton ,  Philippe Gorisse ,  Nadim Khlat

发明人： Hugues Beaulaton ,  Philippe Gorisse ,  Nadim Khlat

IPC分类号： H03L7/085

CPC分类号： H03M7/3022 ,  H03L7/1976

摘要： A noise shaping arrangement for a phase locked loop includes a first order sigma-delta modulator (500) arranged to provide a first-order quantized output and a feedback path output (508). A second order sigma-delta modulator (520) is arranged to receive the feedback path output (508) and provides a second order quantized output. A combination block (530) combines the first and second order quantized outputs to provide a combined third order quantized output (540), which provides noise shaping with a frequency notch spectrum. In this way a new quantization noise shape of third order is provided, such that quantization phase noise may be lowered, the PLL loop bandwidth may be increased, modulation phase error may be reduced and PLL locking speed increased.

摘要翻译： 用于锁相环的噪声整形装置包括布置成提供一阶量化输出和反馈路径输出（508）的第一级Σ-Δ调制器（500）。 第二级Σ-Δ调制器（520）被布置成接收反馈路径输出（508）并提供二阶量化输出。 组合块（530）组合第一和第二阶量化输出以提供组合的三阶量化输出（540），其提供具有频率陷波频谱的噪声整形。 以这种方式，提供三阶新的量化噪声形状，使得量化相位噪声可能降低，PLL环路带宽可能增加，调制相位误差可能降低，PLL锁定速度提高。

公开(公告)号：US07046977B2

公开(公告)日：2006-05-16

申请号：US10496524

申请日：2002-11-04

申请人： Nadim Khlat ,  Cor Voorwinden

发明人： Nadim Khlat ,  Cor Voorwinden

IPC分类号： H04B1/06 ,  H04B7/00

CPC分类号： H03L7/23 ,  H03L7/0802 ,  H03L7/1976

摘要： A terminal includes at least one wireless communication application module (1) and a plurality of further application modules (4, 5, 6, 8). Multiple radio frequency clock signals are generated for the different modules having respective clock frequency characteristics and including at least first and second clock frequencies that are not integral multiples nor sub-multiples of each other nor of a third frequency. The clock generation comprises reference frequency means (14), fractional-N phase-locked loop frequency synthesizer means (15) responsive to the reference frequency means, and different automatic frequency control means for adjusting clock frequencies relative to received signals.The reference frequency means (14) is arranged to supply a common reference frequency signal to a plurality of the fractional-N phase-locked loop frequency synthesizer means (17, 18, 19, 25, 26, 41,42) that supply the first and second clock frequencies respectively for the application modules. Selective activation means (30,52) selectively activates and de-activates the phase lock loop means as required by the corresponding application module or modules.

摘要翻译： 终端包括至少一个无线通信应用模块（1）和多个其他应用模块（4,5,6,8）。 为具有各自时钟频率特性的不同模块生成多个射频时钟信号，并且至少包括第一和第二时钟频率，其不是整数倍，也不是彼此的子倍数，也包括第三频率。 时钟生成包括响应于参考频率装置的参考频率装置（14），分数N锁相环频率合成器装置（15）和用于相对于接收信号调整时钟频率的不同的自动频率控制装置。 参考频率装置（14）被布置为向多个分数N锁相环频率合成器装置（17,18,19,25,26,41,42）提供公共参考频率信号，所述分数N锁相环频率合成器装置提供第一 和第二时钟频率分别用于应用模块。 选择性激活装置（30,52）根据相应的应用模块或模块的要求有选择地激活和去激活锁相环装置。

公开(公告)号：US07039438B2

公开(公告)日：2006-05-02

申请号：US10433369

申请日：2001-09-18

申请人： Nadim Khlat

发明人： Nadim Khlat

IPC分类号： H04M1/00

CPC分类号： H04B1/406 ,  H03D7/163 ,  H03D7/166 ,  H04W88/06

摘要： A multi-mode radio communications device 100 provides simultaneous timebase monitoring for GSM/TDMA/EDGE using Accumulator Type ‘Layer 1’ timers (150) to avoid the need for one or more secondary reference phase lock loops (PLLs). The use of such timers allows achievement by only digital means of GSM and TDMA synchronization requirements without using additional dedicated reference PLLs, as well as saving multiple integrated circuit (IC) pins and several external components. Also, through the use of such timers, no real time software adjustment is required.This provides the following further advantages: support of simultaneous multi-mode; low part count and cost savings; fast recovery from DEEP SLEEP MODE due to the settling time of the crystals only; and simplification of multi-mode DEEP SLEEP MODE since only one single crystal clock frequency relation needs to be tracked rather various clocks frequencies; and simplification of digital signal processing by allowing sharing of the same hardware resources for all modes since those hardware resources are clocked with one clock source derived from one reference clock with maintained synchronization.

摘要翻译： 多模式无线电通信设备100使用累加器类型“层1”定时器（150）提供对GSM / TDMA / EDGE的同时时基监视，以避免需要一个或多个次参考锁相环（PLL）。 这种定时器的使用允许仅通过GSM和TDMA同步要求的数字方式实现，而不需要使用额外的专用参考PLL，以及节省多个集成电路（IC）引脚和多个外部组件。 此外，通过使用这样的定时器，不需要实时软件调整。 这提供了以下进一步的优点：支持同时多模; 零件数量少，成本节约; 由于只有晶体的沉降时间，从DEEP SLEEP MODE快速恢复; 并简化多模DEEP睡眠模式，因为只需要跟踪一个单晶时钟频率关系，而需要跟踪各种时钟频率; 并且通过允许对于所有模式共享相同的硬件资源来简化数字信号处理，因为这些硬件资源是通过一个时钟源来源于一个参考时钟并保持同步的。

公开(公告)号：US20050001748A1

公开(公告)日：2005-01-06

申请号：US10490875

申请日：2002-09-09

申请人： Patrick Clement ,  Nadim Khlat ,  Daniel Schwartz

发明人： Patrick Clement ,  Nadim Khlat ,  Daniel Schwartz

IPC分类号： H03M3/02 ,  H03M3/00

CPC分类号： H03M3/496

摘要： A Multi-Rate Analog-to-Digital Converter (19) is coupled to a single crystal oscillator (17) as a reference clock and has at least two separate channels arranged to sample and convert input data at two differing clock rates. Each channel derives a clock signal from the reference clock. Associated with each of the channels is a Sigma-Delta converter (10a, 10b) comprising a modulator (12), a filter (14) and a resampler (18). The modulator (12) receives input data and provides a data signal to the filter (14), which itself provides a filtered data signal to the associated data resampler. The data resampler resamples the data and provides a digital output signal. As there is sampling in the digital domain the advantages associated with signal processing, speed and low noise injection are obtained. Similarly as the output of the modulator (12) is in digital form, it can be manipulated and processed readily and with existing software.

摘要翻译： 多速率模数转换器（19）耦合到作为参考时钟的单晶振荡器（17），并且具有至少两个单独的通道，其布置成以两个不同的时钟速率对输入数据进行采样和转换。 每个通道从参考时钟导出时钟信号。 与每个通道相关联的是包括调制器（12），滤波器（14）和重采样器（18）的Σ-Δ转换器（10a，10b）。 调制器（12）接收输入数据并向滤波器（14）提供数据信号，滤波器本身将经过滤波的数据信号提供给相关联的数据重采样器。 数据重采样器重新采样数据并提供数字输出信号。 由于在数字领域中采用了与信号处理，速度和低噪声注入相关的优点。 类似地，当调制器（12）的输出是数字形式时，可以容易地和现有的软件操纵和处理调制器（12）的输出。