公开(公告)号：US06804396B2

公开(公告)日：2004-10-12

申请号：US09820130

申请日：2001-03-28

申请人： Nobuo Higaki ,  Yuichi Yoshida ,  Kikuo Fujimura

发明人： Nobuo Higaki ,  Yuichi Yoshida ,  Kikuo Fujimura

IPC分类号： G06K900

CPC分类号： G06K9/00335 ,  B25J11/0005 ,  B25J13/003 ,  G06F3/017 ,  G06F3/167 ,  G10L15/26

摘要： The present invention provides a system for recognizing gestures made by a moving subject. The system comprises a sound detector for detecting sound, one or more image sensors for capturing an image of the moving subject, a human recognizer for recognizing a human being from the image captured by said one or more image sensors, and a gesture recognizer, activated when human voice is identified by said sound detector, for recognizing a gesture of the human being. In a preferred embodiment, the system includes a hand recognizer for recognizing a hand of the human being. The gesture recognizer recognizes a gesture of the human being based on movement of the hand identified by the hand recognizer. The system may further include a voice recognizer that recognizes human voice and determines words from human voice input to the sound detector. The gesture recognizer is activated when the voice recognizer recognizes one of a plurality of predetermined keywords such as “hello!”, “bye”, and “move”.

摘要翻译： 本发明提供了一种用于识别由移动的被摄体制作的手势的系统。 该系统包括用于检测声音的声音检测器，用于捕获移动被摄体的图像的一个或多个图像传感器，用于从由所述一个或多个图像传感器捕获的图像中识别人的人类识别器，以及手势识别器，被激活 当由所述声音检测器识别人声时，用于识别人的手势。在优选实施例中，该系统包括用于识别人的手的手识别器。 手势识别器基于由手识别器识别的手的移动来识别人的手势。 该系统还可以包括语音识别器，其识别人类语音并且确定从人声输入到声音检测器的单词。 当语音识别器识别诸如“你好”，“再见”和“移动”的多个预定关键字之一时，手势识别器被激活。

公开(公告)号：US06237084B1

公开(公告)日：2001-05-22

申请号：US09399577

申请日：1999-09-20

申请人： Toru Morikawa ,  Nobuo Higaki ,  Akira Miyoshi ,  Keizo Sumida

发明人： Toru Morikawa ,  Nobuo Higaki ,  Akira Miyoshi ,  Keizo Sumida

IPC分类号： G06F9302

CPC分类号： G06F9/3001 ,  G06F7/49921 ,  G06F7/5443 ,  G06F7/57

摘要： A processor which executes positive conversion processing, which converts coded data into uncoded data, and saturation calculation processing, which rounds a value to an appropriate number of bits, at high speed. When a positive conversion saturation calculation instruction “MCSST D1” is decoded, the sum-product result register 6 outputs its held value to the path P1. The comparator 22 compares the magnitude of the held value of the sum-product result register 6 with the coded 32-bit integer “0x0000_00FF”. The polarity judging unit 23 judges whether the eighth bit of the value held by the sum-product result register 6 is “ON”. The multiplexer 24 outputs one of the maximum value “0x0000_00FF” generated by the constant generator 21, the zero value “0x0000_0000” generated by the zero generator 25, and the held value of the sum-product result register 6 to the data bus 18.

摘要翻译： 执行正转换处理的处理器，其将编码数据转换为未编码数据，以及饱和度计算处理，其以高速将值舍入到适当位数。 当正转换饱和度计算指令“MCSST D1”被解码时，积和结果寄存器6将其保持值输出到路径P1。 比较器22将和积结果寄存器6的保持值的大小与编码的32位整数“0x0000_00FF”进行比较。 极性判断单元23判断由和积结果寄存器6保持的值的第8位是否为“ON”。 复用器24将由常数发生器21产生的最大值“0x0000_00FF”，由零发生器25产生的零值“0x0000_0000”和和积结果寄存器6的保持值输出到数据总线18中的一个。

公开(公告)号：US5649229A

公开(公告)日：1997-07-15

申请号：US419957

申请日：1995-04-10

申请人： Toshimichi Matsuzaki ,  Nobuo Higaki ,  Masashi Deguchi

发明人： Toshimichi Matsuzaki ,  Nobuo Higaki ,  Masashi Deguchi

IPC分类号： G06F9/30 ,  G06F9/312 ,  G06F9/318 ,  G06F9/32 ,  G06F9/38 ,  G06F12/02 ,  G06F15/78 ,  G06F13/00

CPC分类号： G06F9/30 ,  G06F15/7832 ,  G06F9/30043 ,  G06F9/30058 ,  G06F9/30181

摘要： The data processors of the present invention transfer the contents of address registers and program registers through an unused bus during the cycle of writing into registers and execute, in one cycle, a load instruction or a store instruction that requires address calculation, although the processors have two buses and one arithmetic/logic unit. Also, the data processors assign basic arithmetic instructions between registers and load/store instructions instruction codes having a basic instruction word length of one byte by functionally dividing general purpose-registers into four address registers and four data registers.

摘要翻译： 本发明的数据处理器在写入寄存器的周期期间通过未使用的总线传送地址寄存器和程序寄存器的内容，并且在一个周期中执行需要地址计算的加载指令或存储指令，尽管处理器具有 两个总线和一个算术/逻辑单元。 此外，数据处理器通过将通用寄存器功能划分为四个地址寄存器和四个数据寄存器来分配寄存器之间的基本算术指令和加载/存储指令，其具有一个字节的基本指令字长度。

公开(公告)号：US5628018A

公开(公告)日：1997-05-06

申请号：US333747

申请日：1994-11-03

申请人： Toshimichi Matsuzaki ,  Nobuo Higaki

发明人： Toshimichi Matsuzaki ,  Nobuo Higaki

IPC分类号： G06F9/48 ,  G06F13/24 ,  G06F13/26

CPC分类号： G06F13/26

摘要： The object of the present invention is to provide an interruption processing apparatus which allows for improvements in operational speed and offers flexibility for a variety of systems, while using a lower amount of hardware. When an interruption occurs, then for the present invention shown in FIG. 2 , the corresponding interruption request flag in the interruption control register 1 in the group interruption control unit 5 is set. The interruption request unit 2 then outputs the interruption signal to the CPU 6 based on the interruption request flag. The interruption level arbitration unit 3 adjusts any conflict with other group control units and outputs, as the arbitration result, a signal showing whether output is possible or not for the interruption signal. The group number output unit 4 then outputs the fixed group number for the group in accordance with the arbitration result in response to access from the CPU 6. Once the CPU 6 receives the interruption request signal, no matter from what group interruption control unit the interruption was from, it activates the start of a program starting at the same address.

摘要翻译： 本发明的目的是提供一种中断处理装置，其允许提高操作速度并且在使用较少量的硬件的同时为各种系统提供灵活性。 当发生中断时，对于图1所示的本发明， 如图2所示，组中断控制单元5中的中断控制寄存器1中的相应中断请求标志被置位。 然后，中断请求单元2基于中断请求标志将中断信号输出到CPU6。 中断级别仲裁单元3调整与其他组控制单元的任何冲突，并且作为仲裁结果输出表示对于中断信号是否可以输出的信号。 组号输出单元4然后响应于来自CPU 6的访问，根据仲裁结果输出用于该组的固定组号。一旦CPU 6接收到中断请求信号，无论从什么组中断控制单元中断 来自，它激活从同一地址开始的程序的开始。