公开(公告)号：US5608352A

公开(公告)日：1997-03-04

申请号：US362268

申请日：1994-12-22

申请人： Tetsuro Itakura

发明人： Tetsuro Itakura

IPC分类号： H03F1/32 ,  H03F3/45 ,  H03F3/68

CPC分类号： H03F3/45713 ,  H03F1/3211 ,  H03F3/45098 ,  H03F3/45112 ,  H03F3/45121 ,  H03F3/45183 ,  H03F3/45197 ,  H03F3/4521 ,  H03F3/45219 ,  H03F3/45565 ,  H03F2203/45371

摘要： A differential input circuit includes a first differential pair having first and second transistors for receiving a differential input signal, and for transmitting a differential output signal. A second differential pair includes third and fourth transistors commonly connected to an output of the first differential pair. A differential amplifier circuit includes a third differential pair having fifth and sixth transistors for inputting the differential input signal commonly with the first differential pair for generating a differential amplify signal which is supplied to the second differential pair; so that the potential of an output operating point is set to operate the third and fourth transistors of the second differential pair.

摘要翻译： 差分输入电路包括第一差分对，其具有用于接收差分输入信号的第一和第二晶体管，以及用于发送差分输出信号。 第二差分对包括共同连接到第一差分对的输出的第三和第四晶体管。 差分放大器电路包括具有第五和第六晶体管的第三差分对，所述晶体管用于与所述第一差分对共同地输入所述差分输入信号，以产生提供给所述第二差分对的差分放大信号; 使得输出工作点的电位被设置为操作第二差分对的第三和第四晶体管。

公开(公告)号：US5469092A

公开(公告)日：1995-11-21

申请号：US305471

申请日：1994-09-13

申请人： Tetsuro Itakura

发明人： Tetsuro Itakura

IPC分类号： H03F1/42 ,  G05F3/24 ,  G05F3/26 ,  H03F1/08 ,  H03F3/343 ,  H03F3/345 ,  H03F3/45 ,  H02M11/00

CPC分类号： H03F1/086 ,  G05F3/242 ,  G05F3/262 ,  H03F3/45076

摘要： An electronic circuit having a signal current reflection element, includes a low pass filter for limiting a bandwidth of a control signal which is supplied to a gate of a transistor to which at least an input current is flowing in a current mirror circuit as the signal current reflection element, and a feedforward signal path including a capacitance which is provided between an input terminal of the current mirror circuit and other terminal of the electronic circuit including the current mirror circuit. Accordingly, it is possible to provide the electronic circuit having a miniaturized circuit scale of the current mirror circuit without using a gate grounded circuit and a bias circuit thereof, and an elective high frequency characteristic.

摘要翻译： 具有信号电流反射元件的电子电路包括低通滤波器，用于限制提供给晶体管的至少一个输入电流在电流镜像电路中流动的晶体管的栅极的带宽，作为信号电流 反射元件和包括设置在电流镜电路的输入端子和包括电流镜电路的电子电路的其他端子之间的电容的前馈信号路径。 因此，可以在不使用栅极接地电路及其偏置电路的情况下提供具有电流镜电路的小型化电路规模的电子电路和选择性高频特性。

公开(公告)号：US5444413A

公开(公告)日：1995-08-22

申请号：US943493

申请日：1992-09-11

申请人： Tomohisa Kimura ,  Tetsuro Itakura

发明人： Tomohisa Kimura ,  Tetsuro Itakura

IPC分类号： H03F1/08 ,  H03F3/45 ,  H03K5/24 ,  H03K17/04

CPC分类号： H03F3/45188 ,  H03F1/086 ,  H03F2203/45024 ,  H03F2203/45052 ,  H03F2203/45201 ,  H03F2203/45612

摘要： An operational amplifier circuit includes a differential amplifier having an inverting input, a non-inverting input, and first and second outputs. The differential amplifier is fed by a current source coupled to a power supply voltage. An active load circuit is coupled to the first and second outputs of the differential amplifier and to a ground potential. An additional transistor is provided having a first current-carrying electrode coupled to the first output of the differential amplifier, a second current-carrying electrode coupled to the active load circuit, and an insulated gate electrode coupled to the active load circuit and the second output of the differential amplifier. An inversion amplifier has an input coupled to the second current-carrying electrode of the transistor, and an output, which is fed back through a compensation capacitor to the first output of the differential amplifier.

摘要翻译： 运算放大器电路包括具有反相输入，非反相输入以及第一和第二输出的差分放大器。 差分放大器由耦合到电源电压的电流源馈送。 有源负载电路耦合到差分放大器的第一和第二输出端并接地电位。 提供了附加晶体管，其具有耦合到差分放大器的第一输出的第一载流电极，耦合到有源负载电路的第二载流电极和耦合到有源负载电路和第二输出的绝缘栅电极 的差分放大器。 反相放大器具有耦合到晶体管的第二载流电极的输入端和通过补偿电容器反馈到差分放大器的第一输出的输出端。

公开(公告)号：US5376841A

公开(公告)日：1994-12-27

申请号：US143127

申请日：1993-10-29

申请人： Tetsuro Itakura ,  Takeshi Shima

发明人： Tetsuro Itakura ,  Takeshi Shima

IPC分类号： G09G3/36 ,  G11C27/02 ,  H03K5/153 ,  H03K5/24

CPC分类号： G11C27/026 ,  G11C27/024 ,  G09G2310/0289 ,  G09G3/3688

摘要： A sample-and-hold circuit device which includes a plurality of sample-and-hold circuits and a comparator/amplifier for comparing a reference potential with an output signal which is output from the plurality of sample-and-hold circuits so as to amplify a difference between these two signals. An output of the comparator/amplifier is fed back to respective control terminals of the different sample-and-hold circuits, each being provided as a level control signal. In another embodiment, a plurality of adding circuits are provided for adding the outputs of the plurality of sample-and-hold circuits and then comparing this value with an arbitrary reference potential, whereby a difference between the sum value and the arbitrary reference potential is amplified and fed back to the control terminals of the sample-and-hold circuits.

摘要翻译： 一种采样保持电路装置，包括多个采样保持电路和用于将参考电位与从多个采样和保持电路输出的输出信号进行比较的比较器/放大器，以便放大 这两个信号之间的区别。 比较器/放大器的输出反馈到不同取样和保持电路的各个控制端，每个控制端被提供为电平控制信号。 在另一个实施例中，提供多个加法电路用于将多个采样和保持电路的输出相加，然后将该值与任意的参考电位进行比较，从而放大和值和任意参考电位之间的差值 并反馈到采样保持电路的控制端子。

公开(公告)号：US5343089A

公开(公告)日：1994-08-30

申请号：US155905

申请日：1993-11-23

申请人： Tetsuro Itakura ,  Takeshi Shima

发明人： Tetsuro Itakura ,  Takeshi Shima

IPC分类号： G09G3/36 ,  G11C27/02

CPC分类号： G11C27/026 ,  G11C27/024 ,  G09G2310/0289 ,  G09G3/3688

摘要： A sample-and-hold circuit includes a first switch element which is opened or closed in accordance with a first control signal so as to selectively connect an input signal terminal for receiving an input signal to an internal terminal, a non-linear element for connecting the internal terminal to an output terminal, a potential holding circuit connected between the output terminal and ground, and a second switch element or a current source circuit which is controlled by a second control signal so as to selectively connect the output terminal to ground.

摘要翻译： 采样保持电路包括根据第一控制信号打开或关闭的第一开关元件，以选择性地将用于接收输入信号的输入信号端子连接到内部端子，用于连接的非线性元件 输出端子的内部端子，连接在输出端子和地之间的电位保持电路以及由第二控制信号控制的第二开关元件或电流源电路，以选择性地将输出端子连接到地。

公开(公告)号：US09225168B2

公开(公告)日：2015-12-29

申请号：US13692044

申请日：2012-12-03

申请人： Taichi Ogawa ,  Takeshi Ueno ,  Tetsuro Itakura

发明人： Taichi Ogawa ,  Takeshi Ueno ,  Tetsuro Itakura

IPC分类号： H02J1/00 ,  H02M3/158 ,  H02M3/156

CPC分类号： H02J1/00 ,  H02M3/158 ,  H02M2003/1566 ,  Y10T307/549

摘要： A control circuit of a switching power supply device has a first current source capable of supplying an auxiliary current to a load resistance of the switching power supply device when a load current flowing through the load resistance increases, a second current source capable of pulling in a current from the load resistance when the load current flowing through the load resistance decreases, and an auxiliary current controller configured to activate the first current source or the second current source from when a variation in the load current flowing through the load resistance is detected to have exceeded a predetermined level until a current flowing through the inductor becomes equal to the current flowing through the load resistance.

摘要翻译： 开关电源装置的控制电路具有第一电流源，当流过负载电阻的负载电流增加时能够向开关电源装置的负载电阻提供辅助电流，第二电流源能够拉入 当负载电流流过负载电阻的负载电流下降时，负载电阻的电流以及从流过负载电阻的负载电流的变化检测到的第一电流源或第二电流源的辅助电流控制器被配置为具有 超过预定电平，直到流过电感器的电流变得等于流过负载电阻的电流。

公开(公告)号：US08604766B2

公开(公告)日：2013-12-10

申请号：US13692010

申请日：2012-12-03

申请人： Kei Shiraishi ,  Takeshi Ueno ,  Taichi Ogawa ,  Tetsuro Itakura

发明人： Kei Shiraishi ,  Takeshi Ueno ,  Taichi Ogawa ,  Tetsuro Itakura

IPC分类号： G05F1/59

CPC分类号： G05F1/468 ,  H02M3/157 ,  H02M2003/1566

摘要： A control circuit of a DC-DC converter has a voltage difference signal generator configured to generate a digital voltage difference signal depending on a voltage difference between the output voltage and a reference voltage, a PID controller configured to generate a digital PID signal for determining the duty ratio of the pulse-width modulated signal, based on the digital voltage difference signal, a phase controller configured to generate a digital phase control signal for determining a phase of the pulse-width modulated signal, based on the digital voltage difference signal, and a PWM generator configured to generate the pulse-width modulated signal, based on the digital PID signal and the digital phase control signal.

摘要翻译： DC-DC转换器的控制电路具有：电压差信号发生器，被配置为根据输出电压和参考电压之间的电压差产生数字电压差信号; PID控制器，被配置为产生数字PID信号以确定 基于数字电压差信号的脉宽调制信号的占空比;相位控制器，被配置为基于数字电压差信号产生用于确定脉宽调制信号的相位的数字相位控制信号;以及 PWM发生器，被配置为基于数字PID信号和数字相位控制信号来产生脉宽调制信号。

公开(公告)号：US08537039B2

公开(公告)日：2013-09-17

申请号：US13409516

申请日：2012-03-01

申请人： Junya Matsuno ,  Tetsuro Itakura

发明人： Junya Matsuno ,  Tetsuro Itakura

IPC分类号： H03M1/06

CPC分类号： H03M1/0614 ,  H03M1/12 ,  H03M1/1225

摘要： There is provided a distortion correcting device in which a first A/D converter A/D converts a first input signal to obtain a first converted signal, a second A/D converter A/D converts a second input signal to obtain a second converted signal wherein the second input signal is a signal obtained by reducing an amplitude of the first input signal, or the first input signal is a signal obtained by increasing an amplitude of the second input signal, the exponentiator obtains an exponential signal by raising the second converted signal to an n-th power (“n” is an integer of 2 or more), a adaptive correlation controller carries out adaptive correlation control based on the exponential signal and the second converted signal to generate a distortion signal that is an n-th power component contained in the exponential signal, and a distortion remover removes the distortion signal from the first converted signal.

摘要翻译： 提供了一种失真校正装置，其中第一A / D转换器A / D转换第一输入信号以获得第一转换信号，第二A / D转换器A / D转换第二输入信号以获得第二转换信号 其中所述第二输入信号是通过减小所述第一输入信号的幅度获得的信号，或者所述第一输入信号是通过增加所述第二输入信号的幅度而获得的信号，所述指数器通过提高所述第二转换信号来获得指数信号 到“n”次幂（“n”是2以上的整数）时，自适应相关控制器根据指数信号和第二转换信号进行自适应相关控制，生成作为第n次方的失真信号 分量包含在指数信号中，并且失真去除器从第一转换信号中去除失真信号。

公开(公告)号：US20120176263A1

公开(公告)日：2012-07-12

申请号：US13237260

申请日：2011-09-20

申请人： Shigeo Imai ,  Ippei Akita ,  Tetsuro Itakura

发明人： Shigeo Imai ,  Ippei Akita ,  Tetsuro Itakura

IPC分类号： H03M1/66 ,  H03K17/16

CPC分类号： H03K19/00384 ,  H03M1/0641 ,  H03M1/745

摘要： According to one embodiment, a first switch transistor and a second switch transistor convert an input current to a first current and a second current by performing a switching operation on the basis of differential input voltages, respectively. An input current source supplies the input current to the first and second switch transistors. A noise current generating circuit generates a dummy current to simulate a noise current flowing through the input current source. A third switch transistor and a fourth switch transistor convert the dummy current to a third current and a fourth current by performing a switching operation on the basis of differential input voltages and negatively superimposes the third current and the fourth current on the first and second currents, respectively.

摘要翻译： 根据一个实施例，第一开关晶体管和第二开关晶体管分别通过基于差分输入电压执行开关操作将输入电流转换为第一电流和第二电流。 输入电流源将输入电流提供给第一和第二开关晶体管。 噪声电流产生电路产生虚拟电流以模拟流过输入电流源的噪声电流。 第三开关晶体管和第四开关晶体管通过基于差分输入电压执行开关操作将虚拟电流转换为第三电流和第四电流，并将第三电流和第四电流负向叠加在第一和第二电流上， 分别。

公开(公告)号：US07911281B2

公开(公告)日：2011-03-22

申请号：US12558771

申请日：2009-09-14

申请人： Hiroaki Hoshino ,  Osamu Watanabe ,  Shoji Otaka ,  Tetsuro Itakura

发明人： Hiroaki Hoshino ,  Osamu Watanabe ,  Shoji Otaka ,  Tetsuro Itakura

IPC分类号： H03B5/12 ,  H03B27/00 ,  H03L7/18

CPC分类号： H03L7/099 ,  H03L7/0891 ,  H03L7/18

摘要： A PLL circuit includes: a voltage-controlled oscillator including: a first oscillating portion configured to generate first differential signals; and a second oscillating portion configured to generate second differential signals with a phase difference of 90 degrees from the first differential signals; a phase detector configured to compare phases of third differential signals based on the first and second differential signals with a phase of a reference signal; and a loop filter configured to generate a control voltage for controlling the voltage-controlled oscillator based on a result of the comparison in the phase detector.

摘要翻译： PLL电路包括：压控振荡器，包括：第一振荡部分，被配置为产生第一差分信号; 以及第二振荡部分，被配置为产生与所述第一差分信号相差90度的第二差分信号; 相位检测器，被配置为将基于第一和第二差分信号的第三差分信号的相位与参考信号的相位进行比较; 以及环路滤波器，其被配置为基于相位检测器中的比较结果产生用于控制压控振荡器的控制电压。