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公开(公告)号：US20240340018A1
公开(公告)日：2024-10-10
申请号：US18132910
申请日：2023-04-10
Inventor： Mohyee MIKHEMAR , Alvin Lai Lin , Arya Behzad , Wei-Hong Chen , Ahmed Hamza Sayed
CPC classification number: H03M1/0614 , H04L27/0014 , H04L2027/0016
Abstract: A transmitter includes a first circuit to generate multiphase pulses, and a second circuit to mix a set of in-phase (I) data and quadrature (Q) data with the multiphase pulses and to generate an output radiofrequency (RF) signal. The multiple pulses include multiple I pulses and multiple Q pulses each comprising a pulse that includes a duty cycle such that a first null appears at a third harmonic frequency in a frequency spectrum of the pulse.
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公开(公告)号：US20240056089A1
公开(公告)日：2024-02-15
申请号：US18271451
申请日：2022-01-29
Applicant: The Board of Trustees of the Leland Stanford Junior University Office of the General Counsel
Inventor： Jason Poon
IPC: H03M1/06
CPC classification number: H03M1/0614
Abstract: A hybrid analog-digital electronic circuit for solving non-linear programming problems includes an analog circuit and a digital microcontroller interconnected to each other by an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC). The analog circuit physically realizes a nonlinear programming problem (NLP) where voltages in the analog circuit represent variables in the NLP, and the interconnection of the analog circuit components enforce Karush-Kuhn-Tucke r (KKT) conditions on the variables, such that the voltages in the analog circuit that represent the variables of the NLP naturally converge to an optimal and feasible solution of the NLP. The digital microcontroller sets the voltages in the analog circuit at particular nodes in the analog circuit through the DAC, where the voltages set at the particular nodes determine a precise cost function to be minimized by the analog circuit, where the voltages set at the particular nodes are computed by the digital microcontroller based on measurements obtained from the analog circuit through the ADC.
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公开(公告)号：US09608653B2
公开(公告)日：2017-03-28
申请号：US15039184
申请日：2014-11-21
Applicant: STMicroelectronics S.A.
Inventor： Nicolas Le Dortz , Thierry Simon , Pascal Urard , Caroline Lelandais-Perrault , Rakhel Kumar Parida
CPC classification number: H03M1/0617 , H03M1/0614 , H03M1/0626 , H03M1/1215 , H03M1/1245
Abstract: A device can be used for compensating bandwidth mismatches of time interleaved analog to digital converters. A processor of the device determines, for each original sample stream, an estimated difference between the time constant of a low pass filter representative of the corresponding converter and a reference time constant of a reference low pass filter, and uses this estimated difference and a filtered stream to correct the original stream and deliver a corrected stream of corrected samples.
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公开(公告)号：US08643403B2
公开(公告)日：2014-02-04
申请号：US13712494
申请日：2012-12-12
Applicant: Fujitsu Semiconductor Limited
Inventor： Ian Juso Dedic , Gavin Lambertus Allen
IPC: G11C27/02
CPC classification number: H03M1/0614 , G11C27/02 , H01H9/54 , H03K17/00 , H03L7/00 , H03L7/091 , H03M1/002 , H03M1/0881 , H03M1/1009 , H03M1/12 , H03M1/121 , H03M1/1215 , H03M1/1245 , H03M1/126 , Y10T307/76
Abstract: There is disclosed current-mode time-interleaved sampling circuitry configured to be driven by substantially sinusoidal clock signals. Such circuitry may be incorporated in ADC circuitry, for example as integrated circuitry on an IC chip. The disclosed circuitry is capable of calibrating itself without being taken off-line.
Abstract translation: 公开了被配置为由基本正弦时钟信号驱动的电流模式时间交织采样电路。 这种电路可以并入ADC电路中，例如作为IC芯片上的集成电路。 所公开的电路能够自行校准而不脱机。
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公开(公告)号：US08571137B2
公开(公告)日：2013-10-29
申请号：US13223094
申请日：2011-08-31
Applicant: Thomas J. Kolze , Bruce J. Currivan , Ramon A. Gomez , Kevin Lee Miller
Inventor： Thomas J. Kolze , Bruce J. Currivan , Ramon A. Gomez , Kevin Lee Miller
CPC classification number: H04B1/10 , H03M1/0614 , H03M1/68
Abstract: Distortion and aliasing reduction for digital to analog conversion. Synthesis of one or more distortion terms made based on a digital signal (e.g., one or more digital codewords) is performed in accordance with digital to analog conversion. The one or more distortion terms may correspond to aliased higher-order harmonics, distortion, nonlinearities, clipping, etc. Such distortion terms may be known a priori, such as based upon particular characteristics of a given device, operational history, etc. Alternatively, such distortion terms may be determined based upon operation of a device and/or based upon an analog signal generated from the analog to conversion process. For example, frequency selective measurements made based on an analog signal generated from the digital to analog conversion may be used for determination of and/or adaptation of the one or more distortion terms. One or more DACs may be employed within various architectures operative to perform digital to analog conversion.
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Patent Agency Ranking
公开(公告)号：US20130230130A1
公开(公告)日：2013-09-05
申请号：US13849130
申请日：2013-03-22
Applicant: BROADCOM CORPORATION
Inventor： Thomas J. Kolze , Bruce J. Currivan , Ramon A. Gomez
IPC: H04B1/10
CPC classification number: H04B1/10 , H03M1/0614 , H03M1/68
Abstract: Distortion and aliasing reduction for digital to analog conversion. Synthesis of one or more distortion terms made based on a digital signal (e.g., one or more digital codewords) is performed in accordance with digital to analog conversion. The one or more distortion terms may correspond to aliased higher-order harmonics, distortion, nonlinearities, clipping, etc. Such distortion terms may be known a priori, such as based upon particular characteristics of a given device, operational history, etc. Alternatively, such distortion terms may be determined based upon operation of a device and/or based upon an analog signal generated from the analog to conversion process. For example, frequency selective measurements made based on an analog signal generated from the digital to analog conversion may be used for determination of and/or adaptation of the one or more distortion terms. One or more DACs may be employed within various architectures operative to perform digital to analog conversion.
Abstract translation: 数字到模拟转换的失真和混叠减少。 根据数模转换执行基于数字信号（例如，一个或多个数字码字）所做的一个或多个失真项的合成。 一个或多个失真项可以对应于混叠的高阶谐波，失真，非线性，限幅等。这样的失真项可以是先验的，例如基于给定设备的特定特性，操作历史等。或者， 可以基于设备的操作和/或基于从模拟转换处理产生的模拟信号来确定这样的失真项。 例如，基于从数模转换产生的模拟信号进行的频率选择性测量可用于确定和/或调整一个或多个失真项。 可以在可操作以执行数模转换的各种架构内使用一个或多个DAC。
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公开(公告)号：US20130222161A1
公开(公告)日：2013-08-29
申请号：US13854172
申请日：2013-04-01
Applicant: BROADCOM CORPORATION
Inventor： Thomas J. Kolze , Bruce J. Currivan , Ramon A. Gomez
IPC: H03M1/06
CPC classification number: H04B1/10 , H03M1/0614 , H03M1/68
Abstract: Distortion and aliasing reduction for digital to analog conversion. Synthesis of one or more distortion terms made based on a digital signal (e.g., one or more digital codewords) is performed in accordance with digital to analog conversion. The one or more distortion terms may correspond to aliased higher-order harmonics, distortion, nonlinearities, clipping, etc. Such distortion terms may be known a priori, such as based upon particular characteristics of a given device, operational history, etc. Alternatively, such distortion terms may be determined based upon operation of a device and/or based upon an analog signal generated from the analog to conversion process. For example, frequency selective measurements made based on an analog signal generated from the digital to analog conversion may be used for determination of and/or adaptation of the one or more distortion terms. One or more DACs may be employed within various architectures operative to perform digital to analog conversion.
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公开(公告)号：US20130127648A1
公开(公告)日：2013-05-23
申请号：US13712798
申请日：2012-12-12
Applicant: FUJITSU SEMICONDUCTOR LIMITED
Inventor： Ian Juso DEDIC , Gavin Lambertus Allen
CPC classification number: H03M1/0614 , G11C27/02 , H01H9/54 , H03K17/00 , H03L7/00 , H03L7/091 , H03M1/002 , H03M1/0881 , H03M1/1009 , H03M1/12 , H03M1/121 , H03M1/1215 , H03M1/1245 , H03M1/126 , Y10T307/76
Abstract: There is disclosed current-mode time-interleaved sampling circuitry configured to be driven by substantially sinusoidal clock signals. Such circuitry may be incorporated in ADC circuitry, for example as integrated circuitry on an IC chip. The disclosed circuitry is capable of calibrating itself without being taken off-line.
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公开(公告)号：US08410843B2
公开(公告)日：2013-04-02
申请号：US12987227
申请日：2011-01-10
Applicant: Joel I. Goodman , Benjamin A. Miller , Matthew A. Herman , James E. Vian
Inventor： Joel I. Goodman , Benjamin A. Miller , Matthew A. Herman , James E. Vian
CPC classification number: H03M1/0626 , H03M1/0614 , H03M1/1052 , H03M1/662
Abstract: Polyphase nonlinear digital predistorters (pNDPs) mitigate nonlinear distortions generated by time-interleaved digital-to-analog converters (TIDACs). Processors in an example pNDP compute nonlinear and linear compensation terms representative of channel mismatches and other imperfections in the TIDAC based on the digital input to the TIDAC. The pNDP subtracts these compensation terms from a delayed copy of the digital input to yield a predistorted digital input. The TIDAC converts on the predistorted digital input into a fullband analog output that is substantially free of nonlinear distortion.
Abstract translation: 多相非线性数字预失真器（pNDP）减轻了由时间交错的数模转换器（TIDAC）产生的非线性失真。 示例中的处理器pNDP基于对TIDAC的数字输入来计算表示TIDAC中的信道不匹配和其他缺陷的非线性和线性补偿项。 pNDP从数字输入的延迟拷贝中减去这些补偿项，以产生预失真的数字输入。 TIDAC将预失真的数字输入转换为基本上没有非线性失真的全频模拟输出。
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公开(公告)号：US20120300823A1
公开(公告)日：2012-11-29
申请号：US13557067
申请日：2012-07-24
Applicant: Branislav PETROVIC
Inventor： Branislav PETROVIC
IPC: H04B17/00
CPC classification number: H03M1/0614 , H03F1/3247 , H03M1/12 , H03M1/66 , H03M1/747 , H04B1/713 , H04B17/19 , H04L27/34 , H04L27/38
Abstract: Systems and methods for providing a mechanism by which digital signals can be converted to analog signals with an efficient structure that reduces the number of filters required by providing a mechanism for cancelling images that would otherwise be generated By adjusting three parameters in the system, a selection can be made as to whether to generate upper sidebands, lower sidebands and in which direction the envelope of the output from the system will be skewed.
Abstract translation: 用于提供机制的系统和方法，其中数字信号可以以有效的结构转换为模拟信号，该有效结构通过提供通过调整系统中的三个参数来提供用于消除否则将产生的图像的机制所需的滤波器的数量，选择 可以做出是否产生上边带，下边带，并且在哪个方向上，系统的输出的包络线将被偏斜。
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