Abstract:
The present invention provides a driving circuit for display panel, which comprises a power supply circuit and a driving unit. The power supply circuit outputs a driving power supply voltage. The driving unit produces a driving signal according to a data signal and the driving power supply voltage for driving the display panel. In addition, the voltage level of the driving power supply voltage increases to a predetermined level. Thereby, during the process of charging the display panel by the data driving circuit, the driving power supply voltage output by the power supply circuit increases from a low level to a predetermined level for reducing the power consumption of the driving circuit.
Abstract:
The present invention provides an analog-to-digital converter, which comprises an integration circuit, a threshold signal generating circuit, a main comparison circuit, a sub comparison circuit, a counter, and a decoder. The integration circuit integrates an input signal and produces an integration signal. The threshold signal generating circuit generates a main threshold signal and a plurality of sub threshold signals. The main comparison circuit produces a plurality of main comparison signals according the integration signal and the main threshold signal. The sub comparison circuit produces a plurality of sub comparison signals according to the integration signal and the plurality of sub threshold signals. The counter counts the plurality of main comparison signals and produces a first counting signal. The decoder decodes the plurality of sub comparison signals and produces a second count signal. The first count signal and the second count signal are used for producing a digital signal.
Abstract:
The present invention relates to an oscillating device, which comprises a driving module and an oscillating module. The driving module is used for producing a first driving voltage and a second driving voltage. The oscillating module comprises a first symmetric load circuit, a second symmetric load circuit, and a bias circuit. The first symmetric load circuit and the second symmetric load circuit produce a bias according to the first driving voltage. The bias circuit produces a bias current according to the second driving voltage. The oscillating module produces an oscillating signal according to the first driving voltage and the bias current, where the bias current is proportional to the bias. Thereby, by making the driving signal produced by driving module proportional to the bias of the oscillating module, simple compensation for temperature and process can be performed. Thereby, the frequency can be tuned using a few calibration bits.
Abstract:
The present invention relates to a memory cell having a reduced circuit area, which comprises a first transistor, a second transistor, a third transistor, and a fourth transistor. The first transistor is coupled to a readline and controlled by a wordline. The second transistor is coupled between the first transistor and a low-voltage power supply. The third transistor is coupled to the second transistor and controlled by a bitline. The third transistor controls turn-on and cutoff of the second transistor. Besides, the fourth transistor is coupled to the third transistor and a writeline, and is controlled by the wordline. Thereby, according to the present invention, four transistors form a memory cell, and the objective of saving circuit area can be achieved.
Abstract:
The present invention relates to an analog-to-digital converting circuit, which comprises an integrating circuit, a reference signal generating circuit, a comparator, and a first counting circuit. The integrating circuit integrates an input signal for producing an integration signal. The reference signal generating circuit produces a plurality of reference signals. The comparator receives the integration signal and the plurality of reference signals, and compares the integration signal to the plurality of reference signals sequentially for producing a plurality of comparison signals. The first counting circuit receives the plurality of comparison signals produced by the comparator, and starts to count the plurality of comparison signals for producing a reset signal and resetting the integrating circuit. Because the integrating circuit is not reset once until the comparator produces the plurality of comparison signals, the number of times of resetting the integrating circuit can be reduced, and hence reducing the integral nonlinearity effect. Accordingly, the accuracy of the analog-to-digital converting circuit is enhanced.
Abstract:
The present invention provides a position detection apparatus for a touch panel. The apparatus includes at least one light source disposed on at least a first edge of the touch panel for illumination of a surface of the touch panel, a first detector disposed on one end of a second edge of the touch panel, and a second detector disposed on the other end of the second edge of the touch panel, wherein each of the first and second detectors comprises a plane mirror reflecting an image from the surface of the touch panel and an image sensor for acquisition of the image from the plane mirror, and a position where a pointer touches the touch panel is determined according to the images acquired by the image sensors of the first and second detectors.
Abstract:
The present invention relates to a capacitance sensing circuit with anti-EMI capability. A filter is coupled to a capacitor under test; receives a plurality of reference signals; and produces a first filter signal and a second filter signal. A difference circuit receives the first and second filter signals; eliminates the common-mode noise in the first and second filter signals; and produces a difference signal. The amplitude of the difference signal is related to the capacitance value of the capacitor under test. Thereby, the purpose of sensing capacitance can be achieved. In addition, by eliminating common-mode noise using the difference circuit, the anti-EMI capability can be achieved. Because the difference circuit can adjust the dynamic range of the output of the filter, the capacitance sensing circuit with anti-EMI capability can achieve capacitance sensing in few clock cycles.
Abstract:
The present invention relates to a charge pump capable of enhancing power efficiency and output voltage, which comprises a pump capacitor, a switching module, a first switch, a first buffer, a first switch, and an output capacitor. The switching module is coupled to a first terminal of the pump capacitor. The first switch is coupled between a second terminal of the pump capacitor and a supply voltage. The first buffer receives a first input signal and produces a control signal for controlling the first switch to turn on or cut off. The level of the first input signal ranges between a first voltage and a second voltage, wherein the first and the second voltages are related to the gate voltage of the first switch. The gate voltage of the first switch is a multiple, which is greater than one, of the supply voltage. Thereby, the impedance of the switch is reduced, and hence the power efficiency of the charge pump, the output voltage level, and the area efficiency of integrated circuits are improved.
Abstract:
The present invention discloses an LDO (Low DropOut) linear voltage regulator, which is based on an NMC (Nested Miller Compensation) architecture and can be capacitor-free, wherein an active resistor is added to the feedback path of the Miller compensation capacitor to increase the controllability of the damping factor, solve the problem of extensively using the output capacitor with a parasitic resistance, and solve the problem that a compromise must be made between the damping factor control and the system loop gain. Further, the present invention utilizes a capacitor-sharing technique to reduce the Miller capacitance required by the entire system and accelerate the stabilization of output voltage without influencing stability.
Abstract:
A driving method to improve response time of twisted nematic (TN) and super twisted nematic (STN) passive matrix LCDs without increasing graphic memory (GRAM) adopts an over-driving operation principle to convert data of three primary colors to YCbCr data and over-driving YCbCr data. Then compressing, sampling and combining are performed through a video compression standard to further reduce a portion of storage bits of the YCbCr data and over-driving YCbCr data. Through an output frequency doubling circuit an over-driving compensation potential higher or lower than the original output potential is flexibly given N times according to the over-driving Y′Cb′Cr′ data within the update time period of each data bus. Thereby the response time of the LCDs improves without increasing the GRAM and dynamic picture blurring phenomenon also improves.