公开(公告)号：US6084476A

公开(公告)日：2000-07-04

申请号：US255698

申请日：1999-02-23

申请人： Naoyuki Hamanishi ,  Kazuhiro Oda

发明人： Naoyuki Hamanishi ,  Kazuhiro Oda

IPC分类号： G06G7/12 ,  H03F3/30 ,  H03F3/45

CPC分类号： H03F3/45475 ,  H03F3/3023 ,  H03F2203/45138 ,  H03F2203/45574

摘要： In an operational amplifier constituted by a differential stage which receives two input signals IN- and IN+ and outputs a signal NGP corresponding to the potential difference, a level shift stage which receives the signal NGP and outputs a level-shifted signal NGN, and an output stage which receives the signals NGP and NGN and outputs a signal OUT obtained by amplifying the potential difference between the two input signals, the level shift stage is formed from a DDA. Letting A1, A2, and A3 be the gains of the DDA, the input signal NGP, output signal NGN, and bias voltages VBP and VBN have a linear relation given by A3{A1(VBN-NGN)-A2(VBP-NGP)}=NGN. This maximizes the current drivability of a transistor TN1 on the output stage and controls the punch-through current flowing between transistors TP1 and TN1.

摘要翻译： 在由接收两个输入信号IN-和IN +并输出与电位差对应的信号NGP的差分级构成的运算放大器中，接收信号NGP并输出电平移位信号NGN的电平移位级，以及输出 接收信号NGP和NGN并输出通过放大两个输入信号之间的电位差而获得的信号OUT的级，电平移位级由DDA形成。 令A1，A2和A3为DDA的增益，输入信号NGP，输出信号NGN和偏置电压VBP和VBN具有由A3 {A1（VBN-NGN）-A2（VBP-NGP））给出的线性关系， } = NGN。 这使得输出级上的晶体管TN1的电流驱动能力最大化，并且控制在晶体管TP1和TN1之间流动的穿通电流。

公开(公告)号：US6072341A

公开(公告)日：2000-06-06

申请号：US853497

申请日：1997-05-08

申请人： Merhdad Nayebi ,  Duc Ngo

发明人： Merhdad Nayebi ,  Duc Ngo

IPC分类号： H03F1/32 ,  H03F3/30 ,  H03F3/26

CPC分类号： H03F1/32 ,  H03F3/3088

摘要： A driver circuit with pull down npn transistor drives an output voltage signal in response to an input voltage signal, without high-speed pnp transistors. A first npn transistor provides current to the output node when the output node is at a level equal to and less than the level of the input voltage signal less a base-to-emitter junction drop across the first npn transistor. A second npn transistor sinks current from the output node when the output node is at a level greater than the level of the input voltage signal less the base-to-emitter junction drop across the first npn transistor. The second npn transistor is controlled by a level of a control node. When the level of the output node is greater than the level of the input voltage signal less the base-to-emitter junction drop, the first npn transistor is turned off and the level of the control node is charged up by a current source. When the level of the control node reaches a sufficient level, the second npn transistor is turned on and the level of the output voltage signal is decreased.

摘要翻译： 具有下拉npn晶体管的驱动器电路响应于输入电压信号而驱动输出电压信号，而没有高速pnp晶体管。 当输出节点处于等于并且小于输入电压信号的电平的电平时，第一npn晶体管向输出节点提供电流，减去跨越第一npn晶体管的基极 - 发射极结降。 当输出节点处于大于输入电压信号的电平的电平时，第二个npn晶体管从输出节点吸收电流，减少了跨越第一npn晶体管的基极 - 发射极结降。 第二npn晶体管由控制节点的电平控制。 当输出节点的电平大于输入电压信号的电平时，基极 - 发射极结降低，第一个npn晶体管关闭，并且控制节点的电平由电流源充电。 当控制节点的电平达到足够的电平时，第二个npn晶体管导通，输出电压信号的电平降低。

公开(公告)号：US6054898A

公开(公告)日：2000-04-25

申请号：US859710

申请日：1997-05-21

申请人： Tatsuhiko Okuma ,  Akira Miyamoto ,  Hachiro Sato

发明人： Tatsuhiko Okuma ,  Akira Miyamoto ,  Hachiro Sato

IPC分类号： H03F3/30 ,  H03F3/26

CPC分类号： H03F3/3077

摘要： A semiconductor device capable of maintaining good temperature compensation and reducing manufacture costs of SEPP connecting NPN and PNP power transistors and temperature compensating and biasing circuits. A first semiconductor device has an ordinary bias diode formed on the same semiconductor substrate as an NPN power transistor. A second semiconductor device has one or a plurality of Schottky barrier type diodes formed on the same semiconductor substrate as a PNP power transistor. The forward voltage drop V.sub.1 of the diode is set to an arbitrary constant value smaller than E exclusive of about E/2, and the total forward voltage drop V.sub.2 of the Schottky barrier diode or diodes is set to a predetermined value of about (E-V.sub.1), where E is a total forward voltage drop between the bases and emitters of the NPN and PNP power transistors.

摘要翻译： 能够保持良好的温度补偿并降低SEPP连接NPN和PNP功率晶体管以及温度补偿和偏置电路的制造成本的半导体器件。 第一半导体器件具有形成在与NPN功率晶体管相同的半导体衬底上的普通偏置二极管。 第二半导体器件具有形成在与PNP功率晶体管相同的半导体衬底上的一个或多个肖特基势垒型二极管。 将二极管的正向压降V1设定为小于除E / 2以外的E的任意常数值，将肖特基势垒二极管或二极管的正向压降V2设定为约（E- V1），其中E是NPN和PNP功率晶体管的基极和发射极之间的总正向压降。

公开(公告)号：US6046634A

公开(公告)日：2000-04-04

申请号：US160687

申请日：1998-09-25

申请人： Jun Makino

发明人： Jun Makino

IPC分类号： H03F1/32 ,  H03F3/181 ,  H03F3/30 ,  H03F3/45 ,  H03G3/00 ,  H03F3/00

CPC分类号： H03F3/45381 ,  H03F3/3016 ,  H03F3/3061 ,  H03F2203/30057 ,  H03F2203/30078 ,  H03F2203/30091 ,  H03F2203/30111 ,  H03F2203/30123 ,  H03F2203/45371 ,  H03F2203/45374 ,  H03F2203/45702

摘要： The present amplifier circuit employing floating error-cancellation technique eradicates errors and distortions by canceling them out at the speaker terminal. The circuit utilizes reference, main power, and error suspension amplifiers. The reference amplifier is a small signal amplifier with unity or near unity gain. The main function of the buffer amplifier is to provide a reference signal to be used to isolate the error signal. The main power amplifier is an inverting power amplifier without negative feedback, and whose main function is amplify the audio signal. The error suspension amplifier is a non-inverting power amplifier whose function is amplify the isolated error signal and provide an error potential to a speaker terminal so that the error can be canceled out at the speaker load.

摘要翻译： 使用浮动误差消除技术的本放大器电路通过在扬声器端子处取消它们来消除误差和失真。 该电路使用参考，主电源和错误悬挂放大器。 参考放大器是具有统一或接近单位增益的小信号放大器。 缓冲放大器的主要功能是提供用于隔离误差信号的参考信号。 主功率放大器是没有负反馈的反相功率放大器，其主要功能是放大音频信号。 误差悬挂放大器是同相功率放大器，其功能是放大隔离的误差信号，并向扬声器端子提供误差电位，从而可以在扬声器负载下抵消误差。

公开(公告)号：US6028481A

公开(公告)日：2000-02-22

申请号：US119154

申请日：1998-07-20

申请人： Moshe Gerstenhaber ,  Scott C. Wurcer ,  Francisco Jose Carvalhao dos Santos

发明人： Moshe Gerstenhaber ,  Scott C. Wurcer ,  Francisco Jose Carvalhao dos Santos

IPC分类号： H03F3/18 ,  H03F3/30

CPC分类号： H03F3/3067

摘要： A gain stage is disclosed for use in an amplifier which provides an output signal. The gain stage includes a first transistor including a base, an emitter and a collector. The base is coupled to an input signal applied to the gain stage, and the emitter is coupled to a first source of operating potential. The gain stage also includes a second transistor including a base, an emitter and a collector. The collector of the second transistor is coupled to the collector of the first transistor for providing the output signal. The emitter of the second transistor is coupled to a second source of operating potential. The gain stage also includes a level shifter coupled to both the input signal and the base of the second transistor. The level shifter provides level shifting and produces a gain signal responsive to the input signal.

摘要翻译： 公开了用于提供输出信号的放大器中的增益级。 增益级包括包括基极，发射极和集电极的第一晶体管。 基极耦合到施加到增益级的输入信号，并且发射极耦合到第一工作电位。 增益级还包括包括基极，发射极和集电极的第二晶体管。 第二晶体管的集电极耦合到第一晶体管的集电极以提供输出信号。 第二晶体管的发射极耦合到第二工作电位。 增益级还包括耦合到第二晶体管的输入信号和基极的电平移位器。 电平移位器提供电平移位，并响应于输入信号产生增益信号。

公开(公告)号：US06028479A

公开(公告)日：2000-02-22

申请号：US4628

申请日：1998-01-07

申请人： Joseph N. Babanezhad

发明人： Joseph N. Babanezhad

IPC分类号： H03F3/30 ,  H03F3/45

CPC分类号： H03F3/45273 ,  H03F3/3061 ,  H03F3/45269 ,  H03F3/45659

摘要： A high-speed low-voltage line-driver circuit implemented using various embodiments of high speed current-feedback opamps is disclosed. The line driver of the present invention uses a fully differential architecture whereby common-mode disturbances, such as noise due to substrate or power supply, are cancelled. The driver also uses a current-feedback approach to achieve larger bandwidth. In a specific embodiment, the current-feedback opamp used in the line driver of the present invention uses class A/B structure for both input and output stages.

摘要翻译： 公开了使用高速电流反馈运算放大器的各种实施例实现的高速低压线路驱动电路。 本发明的线路驱动器使用完全差分架构，由此消除由于基板或电源引起的噪声等共模干扰。 驱动程序还使用电流反馈方法来实现更大的带宽。 在具体实施例中，在本发明的线路驱动器中使用的电流反馈运算放大器在输入和输出级都使用A / B类结构。

公开(公告)号：US6014057A

公开(公告)日：2000-01-11

申请号：US848674

申请日：1997-04-29

申请人： Tachio Yuasa

发明人： Tachio Yuasa

IPC分类号： H03F3/45 ,  H03F3/26 ,  H03F3/30 ,  H03F3/345

CPC分类号： H03F3/3001

摘要： A novel amplifier circuit having a wide output signal amplitude range and a small current consumption is disclosed. A signal conversion circuit converts the input signal thereof into a first current signal. A current calculation circuit calculates the difference between a predetermined current value and the first current signal. A current amplifier circuit amplifies the difference current. Since the difference current calculated by the current calculation circuit is amplified, the dynamic range of the output can be widened with a small current flowing in the signal conversion circuit and the current calculation circuit. Further, this amplifier circuit, if designed to supply no output current under no load, can reduce the current consumption since the only steady current that flows under that condition is the small one flowing in the signal conversion circuit and the current calculation circuit.

公开(公告)号：US6005437A

公开(公告)日：1999-12-21

申请号：US54105

申请日：1998-04-02

申请人： Malcolm J. Kay ,  Philip A. Tracy

发明人： Malcolm J. Kay ,  Philip A. Tracy

IPC分类号： H03F3/68 ,  H03F3/217 ,  H03F3/30 ,  H03F3/00

CPC分类号： H03F3/3072 ,  H03F3/3081

摘要： A bridged driving amplifier for driving a capacitive load comprises a first and a second output terminal, and a first and a second supply rail. A first driving section is coupled between the first supply rail and the first output terminal. A second driving section is coupled between the second output terminal and the second supply rail. A third driving section is coupled between the first supply rail and the second output terminal. A fourth driving section is coupled between the first output terminal and the second supply rail. The bridged amplifier is AC-driven such that the first and the second section, when driven, cause an output voltage across the capacitive load of a given polarity, and that the third and the fourth section, when driven, cause an output voltage across the capacitive load of a polarity opposite to the given polarity. The bridged driving amplifier comprises inhibiting means for inhibiting that at least a part of the supply current is inhibited when the capacitive load is discharged during voltage state changing of the voltage across the capacitive load from the one polarity to the other polarity.

摘要翻译： 用于驱动电容性负载的桥接驱动放大器包括第一和第二输出端子以及第一和第二供电轨道。 第一驱动部分耦合在第一电源轨和第一输出端之间。 第二驱动部分连接在第二输出端和第二电源轨之间。 第三驱动部分耦合在第一电源轨和第二输出端之间。 第四驱动部分耦合在第一输出端和第二电源轨之间。 桥接放大器是AC驱动的，使得第一和第二部分在被驱动时引起给定极性的电容性负载两端的输出电压，并且第三和第四部分在被驱动时导致跨越的输出电压 与给定极性相反的极性的容性负载。 桥接驱动放大器包括禁止装置，用于当在电容性负载两端的电压从一极性改变为另一极性的电压状态期间，当电容性负载被放电时，禁止至少一部分供电电流被抑制。

公开(公告)号：US5999054A

公开(公告)日：1999-12-07

申请号：US060979

申请日：1998-04-16

申请人： Hisao Suzuki

发明人： Hisao Suzuki

IPC分类号： H03F3/45 ,  H03F3/30 ,  H03F3/34

CPC分类号： H03F3/3001

摘要： A differential amplifier circuit including a differential input circuit which receives first and second input signals. The differential input circuit amplifies a potential difference between the input signals and outputs first and second voltage signals representing the potential difference. The first and second voltage signals are connected, respectively, to first and second output transistors. The first and second output transistors are serially connected to each other between a first supply voltage and a second supply voltage. A node between the first and second output transistors provides an output terminal. A control circuit receives the first and second voltage signals and controls the drain current of the first output transistor based on a difference between the first and second voltage signals.

摘要翻译： 一种差分放大器电路，包括接收第一和第二输入信号的差分输入电路。 差分输入电路放大输入信号之间的电位差，并输出表示电位差的第一和第二电压信号。 第一和第二电压信号分别连接到第一和第二输出晶体管。 第一和第二输出晶体管在第一电源电压和第二电源电压之间彼此串联连接。 第一和第二输出晶体管之间的节点提供输出端。 控制电路接收第一和第二电压信号，并且基于第一和第二电压信号之间的差来控制第一输出晶体管的漏极电流。

公开(公告)号：US5994942A

公开(公告)日：1999-11-30

申请号：US968064

申请日：1997-11-12

申请人： Masashi Itoh

发明人： Masashi Itoh

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H03F1/02 ,  H03F3/30 ,  H03F3/68 ,  H03K5/08 ,  H03K19/0175

CPC分类号： H03F1/0244 ,  H03F3/3076

摘要： A buffer circuit including current sources and switches to connect and disconnect current sources to an output node. The switches are controlled by voltage detectors for comparing an input signal with a reference level. When the reference level is a predetermined value, the amplitude of an output signal swings up to V.sub.CC and swings down to V.sub.EE.

摘要翻译： 一个缓冲电路，包括用于连接和断开电流源到输出节点的电流源和开关。 开关由电压检测器控制，用于将输入信号与参考电平进行比较。 当基准电平为预定值时，输出信号的振幅上升至VCC并向下摆动至VEE。