Abstract:
A circuit arrangement for protecting an electronic device from damage upon a fault. The circuit arrangement includes at least one first terminal, at least one second terminal, a first interface and a second interface, a fault detection circuit region, a fault signal processing circuit region, and a disconnection circuit region. The at least one first terminal is coupled to the at least one second terminal in a fault-free state, the fault detection circuit region is coupled to the fault signal processing circuit region, the fault signal processing circuit region is coupled to the disconnection circuit region, the disconnection circuit region is configured to disconnect at least one of the at least one first terminal and the at least one second terminal, and the fault detection circuit region, the first and second interfaces, and the disconnection circuit region are configured to be compatible with another different fault signal processing circuit region.
Abstract:
A method for controlling an operating mechanism using a manipulation unit, in which the operating mechanism includes at least one microcontroller, at least one memory with a plurality of memory cells and at least one first value in a first memory cell and at least one debug interface, and the debug interface exhibits a monitoring functionality for monitoring a program code executed by the operating mechanism and using the debug interface a first pre-set timepoint is detected when processing the program code and, using the information transmitted by the debug interface for the first timepoint to the manipulation unit, a trigger timepoint results for a processing routine through the manipulation unit (IN) and a second value is written using the debug interface by the manipulation unit using the processing routine for a second timepoint in the first memory cell before the first memory cell is read by the operating mechanism for a third timepoint.
Abstract:
A method is described and presented for creation of an optimized schedule (P) for execution of a functionality by means of a time-controlled distributed computer system, in which the distributed computer system and the functionality have a set of (especially structural and functional) elements (ei, e1,i, e2,i) of at least one element class (Ei, E1, E2) and the elements (ei, e1,i, e2,i) are at least partially in a dependence.The task of the present invention is to at least partially avoid the drawbacks of methods known from the prior art in the creation of an optimized schedule for distributed computer systems.The method according to the invention, in which the task is solved, is initially and essentially characterized by the fact that the dependences between the elements (ei, e1,i, e2,i) are recognized, classified and the elements (ei, e1,i, e2,i) are assigned to corresponding dependence classes (Ai, A1, A2), and that optimization of schedule (P) occurs by coordination of elements (ei, e1,i, e2,i) of _at least one dependence class (Ai, A1, A2).
Abstract:
A modeling system and process for for computer-aided, block-based modeling involving preparation of a first block diagram (1) in a first model plane (2) that relates to a first abstraction stage, in which at least one block (3) is able to be placed in the first model plane (2) and several blocks are connectable to one another by horizontal data transfer devices for horizontally exchanging data. Further more at least one other block diagram (6) can be arranged on at least one other model plane (5) which is assigned to the first abstraction stage and which is separated from the first model plane (2), so that the first block diagram (1) of the first model plane (2) and the other block diagram (6) of the other model plane (5) form an overall block diagram (7) and that by corresponding vertical data transfer devices (8, 9) which can be arranged on a selection of at least two model planes from the first model plane (2) and the other model planes (5), a vertical exchange of data between at least two selected model planes can be produced.
Abstract:
A system and method for constructing a diagnosis function for mapping a symptom of a fault in an electromechanical system onto the fault by simulating the electromechanical system in at least a fault mode and a node fault mode, and learning a classifier function from the collected simulation results for mapping the system of the fault onto the fault.
Abstract:
The invention relates to a signal display device for displaying signals, in particular on signal paths, in particular of a wiring harness, which may be connected to the signal outputs of an electronic apparatus (4) generating/receiving signals, or looped into the signal paths (SW) between a signal-generating electronic apparatus (5) and a signal-receiving electronic apparatus (6), and with which a signal to be displayed each time is measurable from a plurality, preferably all, of the signal paths (SW), and each measured signal is fed to an evaluation unit (7) that, for each measured signal, activates a multicolor display element (9) based on a value of the signal, such that one of several colors may be displayed using the multicolor display element (9).
Abstract:
A modeling system and process for computer-aided, block-based modeling by preparing a first block diagram in a first model plane that relates to a first abstraction stage, in which at least one block is placeable in the first model plane and several blocks are connectable to one another by horizontal data transfer devices for horizontally exchanging data. At least one other block diagram is arrangeable on at least one other model plane assigned to the first abstraction stage that is separated from the first model plane. The first block diagram of the first model plane and the other block diagram of the other model plane form an overall block diagram that can be arranged on a selection of at least two model planes from the first model plane and the other model planes, so that a vertical exchange of data between at least two selected model planes can be produced.
Abstract:
A method and replay unit for sending secured messages via a messaging system to a receiver ECU to be tested, wherein the replay unit is connected to the device under test via the messaging system, wherein the replay unit is set up to receive first secured messages to be replayed, to remove from the first secured messages a first counter value and a first authenticator, and to generate a second authenticator by means of a second counter value, an encryption algorithm and a key, and wherein the replay unit is set up to generate second secured messages by adding the second counter value and the second authenticator to the first messages, and wherein the replay unit is further adapted to send the second secured messages to the recipient device under test via the messaging system.
Abstract:
A method for monitoring message packets that are exchanged between at least two control units. The message packets are concatenated in a data stream and each have an identifier, a payload, and a length specification of the payload described by a data item of predefined word size. The at least two control units are connected by a distributor. The distributor is connected by a first distributor port to a first of the at least two control units, is connected by a second distributor port to a second of the at least two control units, and is connected by a third distributor port to a computer system. The data stream flows through the first and distributor port for communication between the first node and the second node. The computer system has a memory, and information on the respective identifiers of the message packets is stored in the memory.
Abstract:
An adapter for connecting an embedded system to a control computer having a standard interface, in particular a network interface, a first subcircuit, and a second subcircuit, the first subcircuit being designed to communicate with the control computer via the standard interface by means of a standard protocol, preferably XCP. The first subcircuit is designed to convert a protocol functionality requested in the standard protocol via the standard interface, out of a set of supported protocol functionalities into the call for one or more elementary functions out of a defined overall set of elementary functions. The first subcircuit is connected to the second subcircuit via an internal interface, wherein the second subcircuit has a programmable computing module which is configured to provide at least one elementary function out of the overall set of elementary functions which can be called up via the internal interface by means of a call.