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公开(公告)号:USD678225S1
公开(公告)日:2013-03-19
申请号:US29408556
申请日:2011-12-14
Applicant: Bo-Yu Ko , Chun-Wei Wang , Sheng-Pei Lin
Designer: Bo-Yu Ko , Chun-Wei Wang , Sheng-Pei Lin
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公开(公告)号:US08373179B2
公开(公告)日:2013-02-12
申请号:US13159430
申请日:2011-06-14
Applicant: Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
Inventor: Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
IPC: H01L33/00
CPC classification number: H01L33/145 , H01L33/387
Abstract: A LED chip including a substrate, a semiconductor device layer, a current blocking layer, a current spread layer, a first electrode and a second electrode is provided. The semiconductor device layer is disposed on the substrate. The current blocking layer is disposed on a part of the semiconductor device layer and includes a current blocking segment and a current distribution adjusting segment. The current spread layer is disposed on a part of the semiconductor device layer and covers the current blocking layer. The first electrode is disposed on the current spread layer, wherein a part of the current blocking segment is overlapped with the first electrode. Contours of the current blocking segment and the first electrode are similar figures. Contour of the first electrode and is within contour of the current blocking segment. The current distribution adjusting segment is not overlapped with the first electrode.
Abstract translation: 提供了包括衬底,半导体器件层,电流阻挡层,电流扩散层,第一电极和第二电极的LED芯片。 半导体器件层设置在基板上。 电流阻挡层设置在半导体器件层的一部分上,并且包括电流阻挡段和电流分布调节段。 电流扩展层设置在半导体器件层的一部分上并覆盖电流阻挡层。 第一电极设置在电流扩展层上,其中电流阻挡段的一部分与第一电极重叠。 当前阻挡段和第一电极的轮廓是相似的图。 第一个电极的等高线并且在当前阻挡段的轮廓内。 电流分布调节段不与第一电极重叠。
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公开(公告)号:US08329487B2
公开(公告)日:2012-12-11
申请号:US12916642
申请日:2010-11-01
Applicant: Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
Inventor: Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
IPC: H01L33/02
Abstract: In a fabricating method of an LED, a first-type doped semiconductor material layer, a light emitting material layer, and a second-type doped semiconductor material layer are sequentially formed on a substrate. The first-type and second-type doped semiconductor material layers and the light emitting material layer are patterned to form a first-type doped semiconductor layer, an active layer, and a second-type doped semiconductor layer. The active layer is disposed on a portion of the first-type doped semiconductor layer. The second-type doped semiconductor layer is disposed on the active layer and has a first top surface. A wall structure is formed on the first-type doped semiconductor layer that is not covered by the active layer, and the wall structure surrounds the active layer and has a second top surface higher than the first top surface of the second-type doped semiconductor layer. Electrodes are formed on the first-type and second-type doped semiconductor layers.
Abstract translation: 在LED的制造方法中,在衬底上依次形成第一掺杂半导体材料层,发光材料层和第二掺杂半导体材料层。 图案化第一类型和第二类型掺杂半导体材料层和发光材料层以形成第一掺杂半导体层,有源层和第二掺杂半导体层。 有源层设置在第一掺杂半导体层的一部分上。 第二掺杂半导体层设置在有源层上并具有第一顶表面。 在第一型掺杂半导体层上形成壁结构,其不被有源层覆盖,并且壁结构围绕有源层,并且具有比第二类型掺杂半导体层的第一顶表面高的第二顶表面 。 电极形成在第一和第二掺杂半导体层上。
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公开(公告)号:US20120193664A1
公开(公告)日:2012-08-02
申请号:US13358489
申请日:2012-01-25
Applicant: Jhih-Han LIN
Inventor: Jhih-Han LIN
IPC: H01L33/22
Abstract: A semiconductor light emitting structure includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer and two electrodes. The substrate has a top surface and a bottom surface. The top surface is not parallel to the bottom light emitting surface of the active layer. The first semiconductor layer is disposed on the top surface. The active layer is disposed on at least one portion of the first semiconductor layer. The second semiconductor layer is disposed on the active layer. In an embodiment, the top surface can be realized by an oblique surface, a curved surface or a zigzag surface.
Abstract translation: 半导体发光结构包括基板,第一半导体层,有源层,第二半导体层和两个电极。 基板具有顶表面和底表面。 顶表面不平行于有源层的底部发光表面。 第一半导体层设置在顶表面上。 有源层设置在第一半导体层的至少一部分上。 第二半导体层设置在有源层上。 在一个实施例中,顶表面可以通过倾斜表面,曲面或曲折表面来实现。
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公开(公告)号:USD664108S1
公开(公告)日:2012-07-24
申请号:US29402479
申请日:2011-09-23
Applicant: Chi-Kuon Wang
Designer: Chi-Kuon Wang
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公开(公告)号:US08173467B2
公开(公告)日:2012-05-08
申请号:US13046594
申请日:2011-03-11
Applicant: Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
Inventor: Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
IPC: H01L21/00
CPC classification number: H01L33/44 , H01L33/387 , Y10S438/951
Abstract: A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.
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公开(公告)号:US08173466B2
公开(公告)日:2012-05-08
申请号:US13046584
申请日:2011-03-11
Applicant: Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
Inventor: Kuo-Lung Fang , Chien-Sen Weng , Chih-Wei Chao
IPC: H01L21/00
CPC classification number: H01L33/44 , H01L33/387 , Y10S438/951
Abstract: A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.
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公开(公告)号:USD656108S1
公开(公告)日:2012-03-20
申请号:US29396466
申请日:2011-06-30
Applicant: Kun-Jung Wu
Designer: Kun-Jung Wu
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