IMAGING DEVICE INCLUDING A PLURALITY OF IMAGING UNITS
    111.
    发明申请
    IMAGING DEVICE INCLUDING A PLURALITY OF IMAGING UNITS 有权
    成像设备,包括成像单位的多样性

    公开(公告)号:US20120002096A1

    公开(公告)日:2012-01-05

    申请号:US13032137

    申请日:2011-02-22

    Abstract: An imaging device with a plurality of imaging units is provided. The imaging device includes a supporting substrate, a flexible substrate and a movable unit. The supporting substrate is formed with a hard material, and the flexible substrate includes a plurality of imaging units positioned at least in a width direction. The flexible substrate is fixed at a first edge portion with the supporting substrate, while an opposite second edge portion of the flexible substrate is connected with the movable unit. The movable unit moves the opposite second edge portion of the flexible substrate in the width direction and bends or flattens the flexible substrate. A degree of curvature at which the flexible substrate is bent may vary based on a distance by which the movable unit moves in the width direction, so that a field of view (FOV) of the plurality of imaging units may be adjusted.

    Abstract translation: 提供具有多个成像单元的成像装置。 成像装置包括支撑基板,柔性基板和可移动单元。 支撑基板由硬质材料形成,柔性基板包括至少沿宽度方向定位的多个成像单元。 柔性基板与支撑基板固定在第一边缘部分,而柔性基板的相对的第二边缘部分与可移动单元连接。 可移动单元在柔性基板的宽度方向上移动相对的第二边缘部分并弯曲或平坦化柔性基板。 柔性基板弯曲的弯曲度可以基于可移动单元在宽度方向上移动的距离而变化,使得可以调整多个成像单元的视场(FOV)。

    Carbon nanotube solution dispersant and composition including the same
    113.
    发明授权
    Carbon nanotube solution dispersant and composition including the same 有权
    碳纳米管溶液分散剂及其组成

    公开(公告)号:US07935733B2

    公开(公告)日:2011-05-03

    申请号:US11446972

    申请日:2006-06-06

    Abstract: A dispersant for a more concentrated carbon nanotube solution, and a composition including the same are provided. The dispersant may have a hydrophobic chain structure with head groups capable of surrounding carbon nanotube particles. The dispersant may adsorbed onto the carbon nanotube particles. The composition may include the dispersant, an aqueous liquid medium and a carbon nanotube. The composition may further include an additive. It may be possible to produce a more concentrated carbon nanotube solution exhibiting an increase in dispersion of the carbon nanotube particles and/or more stability.

    Abstract translation: 提供了一种用于更浓缩的碳纳米管溶液的分散剂及包含其的组合物。 分散剂可以具有能够围绕碳纳米管颗粒的头基团的疏水链结构。 分散剂可以吸附在碳纳米管颗粒上。 组合物可以包括分散剂,水性液体介质和碳纳米管。 组合物还可以包含添加剂。 可能生产出显示碳纳米管颗粒分散性增加的更浓缩的碳纳米管溶液和/或更高的稳定性。

    ZERO CAPACITOR RAM WITH RELIABLE DRAIN VOLTAGE APPLICATION AND METHOD FOR MANUFACTURING THE SAME
    114.
    发明申请
    ZERO CAPACITOR RAM WITH RELIABLE DRAIN VOLTAGE APPLICATION AND METHOD FOR MANUFACTURING THE SAME 失效
    具有可靠的漏电电压应用的零电容RAM及其制造方法

    公开(公告)号:US20110092034A1

    公开(公告)日:2011-04-21

    申请号:US12972998

    申请日:2010-12-20

    Applicant: Eun Sung LEE

    Inventor: Eun Sung LEE

    CPC classification number: H01L27/1203 H01L21/84 H01L27/108 H01L27/10802

    Abstract: The following discloses and describes a zero capacitor RAM as well as a method for manufacturing the same. The zero capacitor RAM includes an SOI substrate. This SOI substrate is composed of a stacked structure of a silicon substrate, an embedded insulation film and a silicon layer. This layer is patterned into line types to constitute active patterns. Moreover, a first insulation layer forms between the active patterns and gates form on the active patterns as well as the first insulation layer to extend perpendicularly to the active patterns. In addition, a source forms in the active pattern on one side of each gate, a drain forms in the active pattern on the other side of each gate which is achieved by filling a metal layer. Continuing, a contact plug forms between the gates on the source and an interlayer dielectric forms on the contact plug in addition to the gates Finally, a bit line forms on the interlayer dielectric to extend perpendicularly to the gates and come into contact with the drain.

    Abstract translation: 以下公开并描述了零电容器RAM及其制造方法。 零电容RAM包括SOI衬底。 该SOI衬底由硅衬底,嵌入绝缘膜和硅层的堆叠结构组成。 该层被图案化成行类型以构成活动模式。 此外,在活性图案之间形成有源图案和栅极之间形成的第一绝缘层以及垂直于有源图案延伸的第一绝缘层。 此外,源极在每个栅极的一侧形成有源图案,在每个栅极的另一侧的有源图案中形成漏极,这是通过填充金属层而实现的。 接下来,在源极之间的栅极之间形成接触插塞,除了栅极之外,在接触插塞上形成层间电介质。最后,在层间电介质上形成位线,以垂直于栅极延伸并与漏极接触。

    ZERO CAPACITOR RAM WITH RELIABLE DRAIN VOLTAGE APPLICATION AND METHOD FOR MANUFACTURING THE SAME
    119.
    发明申请
    ZERO CAPACITOR RAM WITH RELIABLE DRAIN VOLTAGE APPLICATION AND METHOD FOR MANUFACTURING THE SAME 失效
    具有可靠的漏电电压应用的零电容RAM及其制造方法

    公开(公告)号:US20090127621A1

    公开(公告)日:2009-05-21

    申请号:US11968701

    申请日:2008-01-03

    Applicant: Eun Sung LEE

    Inventor: Eun Sung LEE

    CPC classification number: H01L27/1203 H01L21/84 H01L27/108 H01L27/10802

    Abstract: The following discloses and describes a zero capacitor RAM as well as a method for manufacturing the same. The zero capacitor RAM includes an SOI substrate. This SOI substrate is composed of a stacked structure of a silicon substrate, an embedded insulation film and a silicon layer. This layer is patterned into line types to constitute active patterns. Moreover, a first insulation layer forms between the active patterns and gates form on the active patterns as well as the first insulation layer to extend perpendicularly to the active patterns. In addition, a source forms in the active pattern on one side of each gate, a drain forms in the active pattern on the other side of each gate which is achieved by filling a metal layer. Continuing, a contact plug forms between the gates on the source and an interlayer dielectric forms on the contact plug in addition to the gates Finally, a bit line forms on the interlayer dielectric to extend perpendicularly to the gates and come into contact with the drain.

    Abstract translation: 以下公开并描述了零电容器RAM及其制造方法。 零电容RAM包括SOI衬底。 该SOI衬底由硅衬底,嵌入绝缘膜和硅层的堆叠结构组成。 该层被图案化成行类型以构成活动模式。 此外,在活性图案之间形成有源图案和栅极之间形成的第一绝缘层以及垂直于有源图案延伸的第一绝缘层。 此外,源极在每个栅极的一侧形成有源图案,在每个栅极的另一侧的有源图案中形成漏极,这是通过填充金属层而实现的。 接下来,在源极之间的栅极之间形成接触塞,除了栅极之外,在接触插塞上形成层间电介质。最后,在层间电介质上形成位线,以垂直于栅极延伸并与漏极接触。

    MEMS device and fabrication method thereof
    120.
    发明授权
    MEMS device and fabrication method thereof 失效
    MEMS器件及其制造方法

    公开(公告)号:US07411261B2

    公开(公告)日:2008-08-12

    申请号:US10773312

    申请日:2004-02-09

    Abstract: A method for fabricating a MEMS device having a fixing part fixed to a substrate, a connecting part, a driving part, a driving electrode, and contact parts, includes patterning the driving electrode on the substrate; forming an insulation layer on the substrate; patterning the insulation layer and etching a fixing region and a contact region of the insulation layer; forming a metal layer over the substrate; planarizing the metal layer until the insulation layer is exposed; forming a sacrificial layer on the substrate; patterning the sacrificial layer to form an opening exposing a portion of the insulation layer and the metal layer in the fixing region; forming a MEMS structure layer on the sacrificial layer to partially fill the opening, thereby forming sidewalls therein; and selectively removing a portion of the sacrificial layer by etching so that a portion of the sacrificial layer remains in the fixing region.

    Abstract translation: 一种用于制造具有固定到基板上的固定部件,连接部件,驱动部件,驱动电极和接触部件的MEMS器件的方法,包括在所述基板上图形化所述驱动电极; 在所述基板上形成绝缘层; 图案化绝缘层并蚀刻绝缘层的固定区域和接触区域; 在衬底上形成金属层; 平坦化金属层直到绝缘层露出; 在所述基板上形成牺牲层; 图案化牺牲层以形成露出固定区域中绝缘层和金属层的一部分的开口; 在所述牺牲层上形成MEMS结构层以部分地填充所述开口,从而在其中形成侧壁; 并且通过蚀刻选择性地去除牺牲层的一部分,使得牺牲层的一部分保留在固定区域中。

Patent Agency Ranking