Abstract:
A method for labeling a spherical target includes receiving an input including a representation of an object. The method also includes estimating unconstrained coordinates corresponding to the object. The method further includes estimating coordinates on a sphere by applying a spherical exponential activation function to the unconstrained coordinates. The method also associates the input with a set of values corresponding to a spherical target based on the estimated coordinates on the sphere.
Abstract:
A method of one shot joint instance and pose recognition in an artificial neural network is presented. The method includes receiving a reference instance of a reference object from a reference image. The reference obj ect has a first identity and a first pose in the reference instance. The method also includes generating a first orbit of the reference object comprising multiple additional poses including a second pose for the reference object. The method further includes recognizing a second instance of an example object from an example image. The example object has the first identity and the second pose in the second instance. The method still further includes recognizing the second pose and first identity of the example object based on comparing the first orbit with a second orbit of the example object.
Abstract:
Adaptive pulse generation circuits for clocking pulse latches with minimum hold time are provided. In one aspect, an adaptive pulse generation circuit employs a dynamic XOR-based logic gate configured to provide a pulse generation signal based on an XOR-based function of data input and data output-based signals of a pulse latch. A pull-down keeper circuit is configured to pull the pulse generation signal to a ground voltage in response to the pulse generation signal being in an inactive state while the clock signal is in an active state. A logic circuit is configured to generate an adaptive pulse signal to clock a pulse latch in response to the pulse generation signal and the clock signal being in an active state. This configuration results in the pulse width of the adaptive pulse signal corresponding to the input-to-output delay of the pulse latch.
Abstract:
An improved switchable capacitor array comprises a plurality of n≥2 capacitor units, each comprising a capacitor with a capacitance and a switch unit. The capacitor units are electrically connected in series. Equidistantly spaced impedance values can be obtained if the values of the capacitances are chosen properly.
Abstract:
A touch panel controller is disclosed herein. The controller includes output circuitry for driving a touch panel sensor and input circuitry for determining when an object performs a touch event over the touch panel sensor. The controller is configured to cause the output circuitry to generate drive signals having a different frequency characteristic when the controller determines noise present within the sensor is above a noise threshold. The controller communicates with a software device driver on a host processor to store signal baseline images for a range of frequencies during production test and power-up. The controller is configured to receive a signal baseline image from the host processor when the controller causes change to a different drive frequency. The controller is configured to cause change to the different drive frequency while the object is still performing the touch event over the touch panel sensor.
Abstract:
An impedance detector includes a sensing circuit with an adjustable impedance. The sensing circuit is coupled to a signal path. Further, an evaluation circuit is coupled to the sensing circuit.
Abstract:
A differential sensing scheme provides a means for detecting one or more touch events on a touch sensitive device in the presence of incident noise. Instead of sensing one touch sensitive channel, such as a row, column, or single touch sensor, multiple touch sensitive channels are sampled at a time. By sampling two nearby channels simultaneously and doing the measurement differentially, noise common to both channels is cancelled. The differential sensing scheme is implemented using simple switch-capacitor AFE circuitry. The originally sensed data on each individual channel is recovered free of common-mode noise. The recovered sensed data is used to determine the presence of one or more touch events and if present the location of each touch event on the touch sensitive device.
Abstract:
System TLBs are integrated within an interconnect, use a and share a transport network to connect to a shared walker port. Transactions are able to pass STLB allocation information through a second initiator side interconnect, in a way that interconnects can be cascaded, so as to allow initiators to control a shared STLB within the first interconnect. Within the first interconnect, multiple STLBs share an intermediate-level translation cache that improves performance when there is locality between requests to the two STLBs.
Abstract:
A touch panel system is described that is configured to reduce inter-symbol interference (ISI). In an implementation, the touch panel system includes a touch panel assembly that includes a plurality of drive electrodes arranged one next to another and a plurality of sensor electrodes arranged one next to another across the drive electrodes to form a plurality of pixels having a mutual capacitance. The touch panel system also includes a transmitter configured to drive the drive electrodes with drive signals derived at least partially from excitation values. The transmitter is configured to apply a window function to the drive signals. The system also includes a receiver configured to sense signals furnished from the sensor electrodes and to determine the mutual capacitance of the pixels.
Abstract:
Apparatus and methods for developing parallel networks. Parallel network design may comprise a general purpose language (GPC) code portion and a network description (ND) portion. GPL tools may be utilized in designing the network. The GPL tools may be configured to produce network specification language (NSL) engine adapted to generate hardware optimized machine executable code corresponding to the network description. The developer may be enabled to describe a parameter of the network. The GPC portion may be automatically updated consistent with the network parameter value. The GPC byte code may be introspected by the NSL engine to provide the underlying source code that may be automatically reinterpreted to produce the hardware optimized machine code. The optimized machine code may be executed in parallel.