公开(公告)号：US20100317195A1

公开(公告)日：2010-12-16

申请号：US12481583

申请日：2009-06-10

申请人： Chih-Wen Feng ,  Pei-Yu Chou ,  Jiunn-Hsiung Liao ,  Ying-Chih Lin ,  Feng-Yi Chang ,  Meng-Chun Lee

发明人： Chih-Wen Feng ,  Pei-Yu Chou ,  Jiunn-Hsiung Liao ,  Ying-Chih Lin ,  Feng-Yi Chang ,  Meng-Chun Lee

IPC分类号： H01L21/306

CPC分类号： H01L21/31144 ,  H01L21/31116 ,  H01L21/31122 ,  H01L21/76802 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for fabricating an aperture is disclosed. The method includes the steps of: depositing a dielectric layer and a hard mask on surface of a semiconductor substrate; patterning the hard mask by forming an aperture in the hard mask; utilizing a gas containing CaXb and CdHXe to perform a pre-treatment on the patterned hard mask and the dielectric layer, in which a, b, d and e from CaXb and CdHXe are integers and X represents halogen atom; and performing an etching process to transfer the aperture into the dielectric layer.

摘要翻译： 公开了一种制造孔的方法。 该方法包括以下步骤：在半导体衬底的表面上沉积介电层和硬掩模; 通过在硬掩模中形成孔来图案化硬掩模; 利用含有CaXb和CdHXe的气体对图案化的硬掩模和介电层进行预处理，其中来自CaXb和CdHXe的a，b，d和e为整数，X为卤素原子; 以及进行蚀刻处理以将孔传送到电介质层中。

公开(公告)号：US07846345B2

公开(公告)日：2010-12-07

申请号：US11669168

申请日：2007-01-31

申请人： Pei-Yu Chou ,  Jiunn-Hsiung Liao

发明人： Pei-Yu Chou ,  Jiunn-Hsiung Liao

IPC分类号： C03C15/00 ,  C03C25/68 ,  C23F1/00

CPC分类号： B82Y10/00 ,  B81C99/009 ,  B82Y40/00 ,  G03F7/0002 ,  H01L33/44 ,  H01L2933/0083 ,  Y10T428/24331

摘要： The method of manufacturing an imprinting template according to the present invention utilizes a semiconductor manufacturing process and comprises a step of etching an oxide layer having a thickness of from 1000 to 8000 angstroms on a substrate by a microlithography and etching process, to form a pattern having a plurality of pillar-shaped holes, thereby forming an imprinting plate having a plurality of pillar-shaped holes. A material layer may be filled into the holes and a part of the oxide layer is removed to form an imprinting template having a plurality of pillar-shaped protrusions. Alternatively, a silicon substrate may be used instead of the substrate and the oxide layer. The imprinting template according to the present invention has advantages of mass production, fast production, and low cost, and is suitable to serve as the imprinting plate for making photonic crystals.

摘要翻译： 根据本发明的制造压印模板的方法利用半导体制造工艺，并且包括通过微光刻和蚀刻工艺在衬底上蚀刻具有1000至8000埃厚度的氧化物层的步骤，以形成具有 多个柱状孔，从而形成具有多个柱状孔的压印板。 可以将材料层填充到孔中，并且去除氧化物层的一部分以形成具有多个柱状突起的压印模板。 或者，可以使用硅衬底代替衬底和氧化物层。 根据本发明的压印模板具有批量生产，快速生产和低成本的优点，并且适合用作制造光子晶体的压印板。

公开(公告)号：US20100304569A1

公开(公告)日：2010-12-02

申请号：US12854913

申请日：2010-08-12

申请人： Pei-Yu Chou ,  Jiunn-Hsiung Liao

发明人： Pei-Yu Chou ,  Jiunn-Hsiung Liao

IPC分类号： H01L21/768

CPC分类号： H01L21/31144 ,  H01L21/0337 ,  H01L21/0338

摘要： A method of forming a contact hole is provided. A pattern is formed in a photo resist layer. The pattern is exchanged into a silicon photo resist layer to form a first opening. Another pattern is formed in another photo resist layer. The pattern is exchanged into a silicon photo resist layer to form a second opening. The pattern having the first, and second openings is exchanged into the interlayer dielectric layer, and etching stop layer to form the contact hole. The present invention has twice exposure processes and twice etching processes to form the contact hole having small distance.

摘要翻译： 提供一种形成接触孔的方法。 在光致抗蚀剂层中形成图案。 将图案交换成硅光致抗蚀剂层以形成第一开口。 在另一光致抗蚀剂层中形成另一图案。 将图案交换为硅光致抗蚀剂层以形成第二开口。 将具有第一和第二开口的图案交换到层间电介质层和蚀刻停止层以形成接触孔。 本发明具有两次曝光工艺和两次蚀刻工艺以形成具有小距离的接触孔。

公开(公告)号：US07445726B2

公开(公告)日：2008-11-04

申请号：US11162271

申请日：2005-09-05

申请人： Kevin C K Wang ,  Jiunn-Hsiung Liao

发明人： Kevin C K Wang ,  Jiunn-Hsiung Liao

IPC分类号： C03C15/00

CPC分类号： H01L21/0274

摘要： A photoresist trimming process is described. An etcher equipped with an etching chamber, a wafer holder, a TCP source and a TCP window is provided. After plasma is generated in the etching chamber, the etching chamber is heated without a wafer therein, and the temperature at the TCP window is monitored simultaneously. It is started, at any time after the temperature at the TCP window reaches a predetermined one, to treat wafers with photoresist layers to be trimmed thereon through the etching chamber.

摘要翻译： 描述光致抗蚀剂修剪工艺。 提供一种装备有蚀刻室，晶片保持器，TCP源和TCP窗口的蚀刻器。 在蚀刻室中产生等离子体之后，加热蚀刻室而没有晶片，同时监视TCP窗口的温度。 在TCP窗口的温度达到预定值之后的任何时间开始，通过蚀刻室处理具有待修整的光致抗蚀剂层的晶片。

公开(公告)号：US20080248429A1

公开(公告)日：2008-10-09

申请号：US11696194

申请日：2007-04-04

申请人： Pei-Yu Chou ,  Jiunn-Hsiung Liao

发明人： Pei-Yu Chou ,  Jiunn-Hsiung Liao

IPC分类号： G03C5/00

CPC分类号： H01L21/31144 ,  H01L21/0337 ,  H01L21/0338

摘要： A method of forming a contact hole is provided. A pattern is formed in a photo resist layer. The pattern is exchanged into a silicon photo resist layer to form a first opening. Another pattern is formed in another photo resist layer. The pattern is exchanged into a silicon photo resist layer to form a second opening. The pattern having the first, and second openings is exchanged into the interlayer dielectric layer, and etching stop layer to form the contact hole. The present invention has twice exposure processes and twice etching processes to form the contact hole having small distance.

摘要翻译： 提供一种形成接触孔的方法。 在光致抗蚀剂层中形成图案。 将图案交换成硅光致抗蚀剂层以形成第一开口。 在另一光致抗蚀剂层中形成另一图案。 将图案交换为硅光致抗蚀剂层以形成第二开口。 将具有第一和第二开口的图案交换到层间电介质层和蚀刻停止层以形成接触孔。 本发明具有两次曝光工艺和两次蚀刻工艺以形成具有小距离的接触孔。

公开(公告)号：US07432194B2

公开(公告)日：2008-10-07

申请号：US11160131

申请日：2005-06-10

申请人： Pei-Yu Chou ,  Jiunn-Hsiung Liao

发明人： Pei-Yu Chou ,  Jiunn-Hsiung Liao

IPC分类号： H01L21/4763

CPC分类号： H01L21/76816 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32135 ,  H01L21/76834

摘要： An etching method is described, including a first etching step and a second etching step. The temperature of the second etching step is higher than that of the first etching step, such that the after-etching-inspection (AEI) critical dimension is smaller than the after-development-inspection (ADI) critical dimension.

摘要翻译： 描述了蚀刻方法，包括第一蚀刻步骤和第二蚀刻步骤。 第二蚀刻步骤的温度高于第一蚀刻步骤的温度，使得蚀刻后检查（AEI）临界尺寸小于显影后检查（ADI）临界尺寸。

公开(公告)号：US20080207000A1

公开(公告)日：2008-08-28

申请号：US12117718

申请日：2008-05-08

申请人： Pei-Yu Chou ,  Jiunn-Hsiung Liao

发明人： Pei-Yu Chou ,  Jiunn-Hsiung Liao

IPC分类号： H01L21/311

CPC分类号： H01L21/76802 ,  H01L21/02063 ,  H01L21/31116

摘要： A substrate has thereon a conductive region to be partially exposed by the contact hole, a contact etch stop layer overlying the substrate and covering the conductive region, and an inter-layer dielectric (ILD) layer on the contact etch stop layer. A photoresist pattern is formed on the ILD layer. The photoresist pattern has an opening directly above the conductive region. Using the photoresist pattern as an etch hard mask and the contact etch stop layer as an etch stop, an anisotropic dry etching process is performed to etch the ILD layer through the opening, thereby forming an upper hole region. The photoresist pattern is removed. An isotropic dry etching process is performed to dry etching the contact etch stop layer selective to the ILD layer through the upper hole region, thereby forming a widened, lower contact bottom that exposes an increased surface area of underlying conductive region.

摘要翻译： 衬底上具有由接触孔部分露出的导电区域，覆盖衬底并覆盖导电区域的接触蚀刻停止层以及接触蚀刻停止层上的层间介电层（ILD）层。 在ILD层上形成光刻胶图形。 光致抗蚀剂图案具有直接在导电区域上方的开口。 使用光致抗蚀剂图案作为蚀刻硬掩模和接触蚀刻停止层作为蚀刻停止件，执行各向异性干蚀刻工艺以通过开口蚀刻ILD层，从而形成上部孔区域。 去除光致抗蚀剂图案。 执行各向同性干蚀刻工艺，以通过上孔区域干蚀刻对ILD层有选择性的接触蚀刻停止层，从而形成暴露下面导电区域的增加的表面积的加宽的下接触底部。

公开(公告)号：US20080102643A1

公开(公告)日：2008-05-01

申请号：US11554600

申请日：2006-10-31

申请人： Yi-Hsing Chen ,  Meng-Jun Wang ,  Jiunn-Hsiung Liao ,  Min-Chieh Yang

发明人： Yi-Hsing Chen ,  Meng-Jun Wang ,  Jiunn-Hsiung Liao ,  Min-Chieh Yang

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/31144 ,  H01L21/28123 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/31138 ,  H01L21/32139 ,  H01L21/76224 ,  H01L21/76802

摘要： A patterning method is provided. The method includes the steps of firstly forming an underlying layer, a silicon rich organic layer, and a photoresist layer on the material layer in succession. The photoresist layer is patterned, and the silicon rich organic layer is etched using the photoresist layer as a mask. Then, an etching process is performed to pattern the underlying layer using the silicon rich organic layer as a mask. Reactive gases adopted in the etching process include a passivation gas, an etching gas, and a carrier gas. The passivation gas forms a passivation layer at side walls of the patterned underlying layer during the etching process. After that, the material layer is etched using the underlying layer as a mask to form an opening in material layer. Finally, the underlying layer is removed.

摘要翻译： 提供了图案化方法。 该方法包括以下步骤：首先在材料层上依次形成下层，富硅有机层和光致抗蚀剂层。 对光致抗蚀剂层进行图案化，使用光致抗蚀剂层作为掩模蚀刻富硅有机层。 然后，使用富硅有机层作为掩模进行蚀刻工艺以对下层进行图案化。 在蚀刻工艺中采用的反应气体包括钝化气体，蚀刻气体和载气。 钝化气体在蚀刻工艺期间在图案化的下层的侧壁处形成钝化层。 之后，使用下层作为掩模蚀刻材料层，以在材料层中形成开口。 最后，底层被删除。

公开(公告)号：US20070202688A1

公开(公告)日：2007-08-30

申请号：US11361645

申请日：2006-02-24

申请人： Pei-Yu Chou ,  Wen-Chou Tsai ,  Jiunn-Hsiung Liao

发明人： Pei-Yu Chou ,  Wen-Chou Tsai ,  Jiunn-Hsiung Liao

IPC分类号： H01L21/467

CPC分类号： H01L21/76897 ,  H01L21/31116 ,  H01L21/76802

摘要： A method for forming a contact opening is described. A substrate formed with a semiconductor device thereon is provided, and then an etch stop layer, a dielectric layer and a patterned photoresist layer are formed sequentially over the substrate. The exposed dielectric layer and 20% to 90% of the thickness of the exposed etch stop layer are removed to form an opening. After the patterned photoresist layer is removed, an etch step using a reaction gas is conducted to remove the etch stop layer remaining at the bottom of the opening and form a contact opening that exposes a part of the device, wherein the reaction gas is selected from CF4, CHF3 and CH2F2. By using the method, a micro-masking effect is avoided, and oxidation at the bottom of the contact opening conventionally caused by the photoresist removal using oxygen plasma is also avoided.

摘要翻译： 描述形成接触开口的方法。 提供了在其上形成有半导体器件的衬底，然后在衬底上顺序地形成蚀刻停止层，电介质层和图案化光致抗蚀剂层。 暴露的介电层和暴露的蚀刻停止层的厚度的20％至90％被去除以形成开口。 在去除图案化的光致抗蚀剂层之后，进行使用反应气体的蚀刻步骤以除去残留在开口底部的蚀刻停止层，并形成露出部分器件的接触开口，其中反应气体选自 CF 4，CH 3，CH 3和CH 2 2。 通过使用该方法，避免了微掩蔽效应，并且也避免了常规由使用氧等离子体的光致抗蚀剂去除引起的接触开口底部的氧化。

公开(公告)号：US20060281313A1

公开(公告)日：2006-12-14

申请号：US11160131

申请日：2005-06-10

申请人： Pei-Yu Chou ,  Jiunn-Hsiung Liao

发明人： Pei-Yu Chou ,  Jiunn-Hsiung Liao

IPC分类号： H01L21/302

CPC分类号： H01L21/76816 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32135 ,  H01L21/76834

摘要： An etching method is described, including a first etching step and a second etching step. The temperature of the second etching step is higher than that of the first etching step, such that the after-etching-inspection (AEI) critical dimension is smaller than the after-development-inspection (ADI) critical dimension.

摘要翻译： 描述了蚀刻方法，包括第一蚀刻步骤和第二蚀刻步骤。 第二蚀刻步骤的温度高于第一蚀刻步骤的温度，使得蚀刻后检查（AEI）临界尺寸小于显影后检查（ADI）临界尺寸。