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111.
公开(公告)号:US20240028231A1
公开(公告)日:2024-01-25
申请号:US18337873
申请日:2023-06-20
Applicant: Micron Technology, Inc.
Inventor: Luca Bert
IPC: G06F3/06
CPC classification number: G06F3/064 , G06F3/0656 , G06F3/0679 , G06F3/0604
Abstract: A host system to query, during booting up of the host system, a superblock size in a connected memory sub-system. The host system can place write requests into separate streams and send the streams to the memory sub-system to store data of the write requests into separate sets of superblocks for the streams respectively. The host system can allocate, a plurality of log buffers for the streams respectively and record, into the log buffers, sequences of logical addresses as in the streams respectively. The host system can trim a stream, among the plurality of streams, by issuing commands to the memory sub-system to erase, according to the superblock size, an amount of data from a portion of a sequence of logical addresses recorded in a log buffer for the stream, causing the memory sub-system to free at least one superblock.
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公开(公告)号:US20240020182A1
公开(公告)日:2024-01-18
申请号:US17866341
申请日:2022-07-15
Applicant: Micron Technology, Inc.
Inventor: Luca Bert
CPC classification number: G06F9/546 , G06F13/1668
Abstract: A standalone storage product having: a first bus connector for connecting to an external processor; a second bus connector for connecting to an external network interface; a storage device accessible over the network interface; and a processing device configured to communicate, via the second bus connector, with the network interface to obtain storage access messages represented by incoming packets received at the network interface from a computer network. The processing device can: identify, from the storage access messages, first messages and second messages; provide, the first messages via the first bus connector, to the processor; and provide, the second messages, to the storage device without the second messages going through the processor. The storage device is configured to: receive, via the first bus connector, third messages from the processor; and execute commands in the second messages and the third messages to implement a network storage service.
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113.
公开(公告)号:US20240020062A1
公开(公告)日:2024-01-18
申请号:US18458956
申请日:2023-08-30
Applicant: Micron Technology, Inc.
Inventor: Luca Bert
IPC: G06F3/06
CPC classification number: G06F3/067 , G06F3/0632 , G06F3/0605 , G06F3/0656
Abstract: A storage product manufactured as a computer component to facilitate network storage services. The storage product has a bus connector, a network interface, and a local storage device. A message selection configuration can be written into the storage product to control separation of incoming messages received in the network interface into first messages and third messages. The first messages are sent through the bus connector for processing by a local host system to generate second messages. The second messages and the third messages are sent to the local storage device. The local storage device processes the second messages and the third messages to implement the network storage services.
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公开(公告)号:US20240020011A1
公开(公告)日:2024-01-18
申请号:US17866348
申请日:2022-07-15
Applicant: Micron Technology, Inc.
Inventor: Luca Bert
CPC classification number: G06F3/0613 , G06F13/42 , G06F3/0647 , G06F3/067
Abstract: A storage product manufactured as a standalone computer component and installed in a computing system to implement an internet application. The storage product includes a network interface, a host interface, computing circuits, and a local storage device having a storage capacity accessible via the network interface. A data generator is connected to the network interface. A local host system is connected to the host interface to control access, made via the network interface. The data generator can send bulk data to the network interface. The computing circuits can generate derived data from the bulk data and store the derived data and/or the bulk data in the local storage device. A central server and/or a user device can connect over internet via to the network interface of the storage product to access the derived data and/or the bulk data.
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115.
公开(公告)号:US11853819B1
公开(公告)日:2023-12-26
申请号:US17866339
申请日:2022-07-15
Applicant: Micron Technology, Inc.
Inventor: Luca Bert
CPC classification number: G06F9/546 , G06F13/1668
Abstract: A storage product manufactured as a standalone computer component, having a bus connector to an external processor, a storage device, a random-access memory, a computational storage processor, and a processing device to identify, among storage access messages from a computer network, first messages, second messages, and third messages. The random-access memory hosts first queues shared between the processing device and the external processor, and second queues shared between the processing device and the computational storage processor. The processing device can place the first messages in the first queues for the external processor to generate fourth messages, place the second messages in the second queues for the computational storage processor to generate fifth messages, and provide the third messages to the storage device. The storage device can process the third messages, the fourth messages, and the fifth messages to implement requests in the storage access messages.
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公开(公告)号:US11809714B2
公开(公告)日:2023-11-07
申请号:US17187497
申请日:2021-02-26
Applicant: Micron Technology, Inc.
Inventor: Luca Bert
CPC classification number: G06F3/0613 , G06F3/0631 , G06F3/0652 , G06F3/0683 , G06F12/0246 , G06F2212/7201
Abstract: An input/output (I/O) write request directed at a plurality of memory devices having memory cells is received by a processing device. The write request includes a set of data. The processing device appends the set of data to a compound data object. The compound data object comprises one or more sequentially written data objects. The processing device associates the compound data object with one or more groups of memory cells of the plurality of memory devices. The processing device causes the compound data object to be written to the one or more groups of memory cells of the plurality of memory devices.
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117.
公开(公告)号:US20230244394A1
公开(公告)日:2023-08-03
申请号:US17591554
申请日:2022-02-02
Applicant: Micron Technology, Inc.
Inventor: Luca Bert , Joseph Harold Steinmetz
IPC: G06F3/06
CPC classification number: G06F3/0631 , G06F3/0608 , G06F3/0634 , G06F3/0659 , G06F3/0679
Abstract: An apparatus with a solid state drive (SSD) configured to manage storage resources for proof of space activities. The SSD has a host interface configured to receive at least read commands and write commands from an external host system. The SSD has memory cells formed on at least one integrated circuit die, and a processing device configured to control executions of the read commands and the write commands. In response to an indication of a storage space request for the host system, the apparatus identifies a portion of storage resources used to store the data of the proof of space plot, and reallocates the portion to service the host system. Subsequently, the SSD can continue proof of space activities based on the proof of space plot using the data stored in a remaining portion of the storage resources initially allocated to the proof of space plot.
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公开(公告)号:US20230236734A1
公开(公告)日:2023-07-27
申请号:US18193184
申请日:2023-03-30
Applicant: Micron Technology, Inc.
Inventor: Luca Bert
CPC classification number: G06F3/0613 , G06F3/0611 , G06F9/4881 , G06F3/0679 , G06F3/0665 , G06F3/0659
Abstract: A processing device, operatively coupled with the memory device, is configured to provide a plurality of functions for accessing the memory device, wherein a function of the plurality of function receives input/output (I/O) operations from a host computing system. The processing device further determines a quality of service level of each function of the plurality of functions, and assigns to each function of the plurality of functions a corresponding function weight based on a corresponding quality of service level. The processing device also selects, for execution, a subset of the I/O operations, the subset comprising a number of I/O operations received at each function of the plurality of functions, wherein the number of I/O operations is determined according to the corresponding function weight of each function. The processing logic then executes the subset of I/O operations at the memory device.
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公开(公告)号:US11693797B2
公开(公告)日:2023-07-04
申请号:US17866717
申请日:2022-07-18
Applicant: Micron Technology, Inc.
Inventor: Joseph H. Steinmetz , Luca Bert , William Akin
CPC classification number: G06F13/1668 , G06F11/0727 , G06F11/0751 , G06F11/0772 , G06F13/4282 , G06F2213/0026
Abstract: A system includes a first memory device including a non-volatile memory device, a second memory device and a processing device, operatively coupled with the first memory device and the second memory device, to perform operations including configuring a system in accordance with a configuration designating an interface standard for exposing a storage element implemented on the first memory device to a first protocol of the interface standard and a persistent memory region (PMR) implemented on the second memory device to a second protocol of the interface standard, and performing at least one system operation based on the configuration.
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公开(公告)号:US20230186289A1
公开(公告)日:2023-06-15
申请号:US17550736
申请日:2021-12-14
Applicant: Micron Technology, Inc.
Inventor: Luca Bert , Joseph Harold Steinmetz
CPC classification number: G06Q20/38215 , G06Q20/065 , G06Q20/4014 , G06F3/0659 , G06F3/0631 , G06F3/0604 , G06F3/067
Abstract: An apparatus with a solid state drive (SSD) having an internal host to control proof of space activities. The SSD has a host interface configured to receive at least read commands and write commands from an external host system. The SSD has memory cells formed on at least one integrated circuit die, and a processing device configured to control executions of the read commands to retrieve data from the memory cells and executions the write commands to store data into the memory cells. The internal host operable is to generate, independent of the external host system, commands related to proof of space, such as plot generation, and plot farming.
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