公开(公告)号：US20050188444A1

公开(公告)日：2005-08-25

申请号：US11036379

申请日：2005-01-18

Applicant: Soo-hwan Jeong ,  Wan-jun Park ,  In-kyeong Yoo ,  Ju-hye Ko

Inventor： Soo-hwan Jeong ,  Wan-jun Park ,  In-kyeong Yoo ,  Ju-hye Ko

IPC: B82B3/00 ,  C01B31/02 ,  C23C26/00 ,  C23C28/00 ,  H01J1/304 ,  H01J9/02 ,  C23C16/00

CPC classification number: C30B29/602 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/162 ,  C23C26/00 ,  C30B25/00 ,  H01J1/304 ,  H01J9/025 ,  H01J2201/30469

Abstract: Provided are a method of horizontally growing carbon nanotubes and a carbon nanotube device. The method includes: depositing an aluminum layer on a substrate; forming an insulating layer over the substrate to cover the aluminum layer; patterning the insulating layer and the aluminum layer on the substrate to expose a side of the aluminum layer; forming a plurality of holes in the exposed side of the aluminum layer to a predetermined depth; depositing a catalyst metal layer on the bottoms of the holes; and horizontally growing the carbon nanotubes from the catalyst metal layer. The carbon nanotubes can be grown in directions rather that horizontally relative to the substrate when laid flat.

Abstract translation: 提供了水平生长碳纳米管和碳纳米管装置的方法。 该方法包括：在基底上沉积铝层; 在所述基板上形成绝缘层以覆盖所述铝层; 将绝缘层和铝层图案化在基板上以暴露铝层的一侧; 在铝层的暴露侧形成多个孔至预定深度; 在所述孔的底部沉积催化剂金属层; 并从催化剂金属层水平生长碳纳米管。 当平铺时，碳纳米管可以在相对于基底的水平方向上生长。

公开(公告)号：US20050169048A1

公开(公告)日：2005-08-04

申请号：US11097157

申请日：2005-04-04

Applicant: Dong-wook Kim ,  In-kyeong Yoo ,  Jung-hyun Sok ,  June-key Lee

Inventor： Dong-wook Kim ,  In-kyeong Yoo ,  Jung-hyun Sok ,  June-key Lee

IPC: G11C11/15 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/105 ,  H01L27/22 ,  H01L29/788 ,  H01L29/792 ,  H01L43/08 ,  G11C11/00

CPC classification number: H01L27/228 ,  B82Y10/00

Abstract: A single transistor type magnetic random access memory device and a method of operating and manufacturing the same, wherein the single transistor type magnetic random access memory device includes a substrate, first and second doped regions spaced apart from each other, a gate dielectric layer on a portion of the semiconductor substrate between the first and second doped regions, a magnetic tunnel junction on the gate dielectric layer, word lines on the magnetic tunnel junction extending in a first direction which is the same direction as the second doped region, bit lines connected to the first doped region in a second direction perpendicular to the first direction, and an insulating layer covering the gate dielectric layer, the magnetic tunnel junction, and the word lines. The single transistor type magnetic random access memory device has a simple circuit structure, has a prolonged lifetime and is easy to manufacture.

Abstract translation: 单晶体管型磁随机存取存储器件及其操作和制造方法，其中单晶体管型磁随机存取存储器件包括衬底，彼此间隔开的第一和第二掺杂区，栅极电介质层 在第一和第二掺杂区域之间的半导体衬底的一部分，栅极电介质层上的磁性隧道结，在与第二掺杂区域相同的第一方向延伸的磁性隧道结上的字线，位线连接到 垂直于第一方向的第二方向上的第一掺杂区域和覆盖栅极介电层，磁性隧道结和字线的绝缘层。 单晶体管型磁随机存取存储器件具有简单的电路结构，寿命长，易于制造。

公开(公告)号：US20050095775A1

公开(公告)日：2005-05-05

申请号：US10995116

申请日：2004-11-24

Applicant: In-Kyeong Yoo ,  Sun-ae Seo ,  Hyun-jo Kim

Inventor： In-Kyeong Yoo ,  Sun-ae Seo ,  Hyun-jo Kim

IPC: H01L27/10 ,  G11C11/401 ,  G11C11/404 ,  G11C16/04 ,  H01L21/00 ,  H01L21/822 ,  H01L21/8246 ,  H01L27/112 ,  H01L29/792 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L49/02

CPC classification number: H01L27/11206 ,  G11C16/0475 ,  H01L27/112

Abstract: A memory device having one transistor and one resistant element as a storing means and a method for driving the memory device, includes an NPN-type transistor formed on a semiconductor substrate, an interlayer insulating film formed on the semiconductor substrate to cover the transistor in which a contact hole exposing a source region of the transistor is formed, a resistant material in which a bit data “0” or “1” is written connected to the source region of the transistor by a conductive plug or an insulating film, and a conductive plate contacting the resistant material. The memory device exhibits improved degree of integration, reduced current consumption by lengthening a refresh period thereof, and enjoys simplified manufacturing process due to a simple memory cell structure.

Abstract translation: 具有一个晶体管和一个电阻元件作为存储装置的存储器件和用于驱动存储器件的方法包括形成在半导体衬底上的NPN型晶体管，形成在半导体衬底上以覆盖晶体管的层间绝缘膜， 形成暴露晶体管的源极区域的接触孔，通过导电插塞或绝缘膜将位数据“0”或“1”写入的电阻材料连接到晶体管的源极区域，并且导电 板接触抵抗材料。 存储器件通过延长其刷新周期而呈现出提高的集成度，降低的电流消耗，并且由于简单的存储单元结构而享有简化的制造工艺。

公开(公告)号：US06815783B2

公开(公告)日：2004-11-09

申请号：US10252532

申请日：2002-09-24

Applicant: Dong-wook Kim ,  In-kyeong Yoo ,  Jung-hyun Sok ,  June-key Lee

Inventor： Dong-wook Kim ,  In-kyeong Yoo ,  Jung-hyun Sok ,  June-key Lee

IPC: H01L2982

CPC classification number: H01L27/228 ,  B82Y10/00

Abstract: A single transistor type magnetic random access memory device and a method of operating and manufacturing the same, wherein the single transistor type magnetic random access memory device includes a substrate, first and second doped regions spaced apart from each other, a gate dielectric layer on a portion of the semiconductor substrate between the first and second doped regions, a magnetic tunnel junction on the gate dielectric layer, word lines on the magnetic tunnel junction extending in a first direction which is the same direction as the second doped region, bit lines connected to the first doped region in a second direction perpendicular to the first direction, and an insulating layer covering the gate dielectric layer, the magnetic tunnel junction, and the word lines. The single transistor type magnetic random access memory device has a simple circuit structure, has a prolonged lifetime and is easy to manufacture.

公开(公告)号：US06740925B2

公开(公告)日：2004-05-25

申请号：US10041469

申请日：2002-01-10

Applicant: In-kyeong Yoo ,  Byong-man Kim

Inventor： In-kyeong Yoo ,  Byong-man Kim

IPC: H01L2976

CPC classification number: B82Y10/00 ,  G11C2216/08 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/7881

Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.

Abstract translation: 提供了包括具有RAM和ROM功能的单个晶体管的存储器件及其操作和制造方法。 存储器件包括形成在衬底上的单个晶体管。 晶体管可以是具有带非易失性存储元件的栅极的存储晶体管，或者在晶体管和衬底之间提供非易失性存储元件。

公开(公告)号：US06687210B2

公开(公告)日：2004-02-03

申请号：US10090629

申请日：2002-03-06

Applicant: In-kyeong Yoo ,  Won-bong Choi ,  Byong-man Kim

Inventor： In-kyeong Yoo ,  Won-bong Choi ,  Byong-man Kim

IPC: G11B700

CPC classification number: G11B11/08 ,  G11B9/08 ,  G11B13/00

Abstract: A high-density information storage apparatus using electron emission and methods of writing, reading and erasing information using the same are provided. The high-density information storage apparatus includes a lower electrode, a photoconductive layer and a recording medium sequentially provided on the lower electrode, a conductive layer converting unit for making the photoconductive layer conductive, a data write and read unit for writing data to the recording medium or reading data from the recording medium, a data loss preventing unit for preventing loss of data during data write and read operations, and a power supply connected to the lower electrode and the data write and read unit, for supplying voltage necessary for reading and writing data.

Abstract translation: 提供了使用电子发射的高密度信息存储装置和使用其的写入，读取和擦除信息的方法。 高密度信息存储装置包括下电极，光电导层和顺序地设置在下电极上的记录介质，用于使光电导层导通的导电层转换单元，用于将数据写入记录的数据写入和读取单元 介质或从记录介质读取数据，数据丢失防止单元，用于防止数据写入和读取操作期间的数据丢失，以及连接到下部电极和数据写入和读取单元的电源，用于提供读取所需的电压 写数据

公开(公告)号：US5898609A

公开(公告)日：1999-04-27

申请号：US86489

申请日：1998-05-29

Applicant: In-kyeong Yoo

Inventor： In-kyeong Yoo

IPC: G11C11/22

CPC classification number: G11C11/22

Abstract: A ferroelectric random access memory having a discharge circuit for stably discharging pyroelectric charges generated in a ferroelectric capacitor without affecting write and read operations is provided. In the ferroelectric random access memory having the discharge circuit according to the present invention, the pyroelectric charges between the ferroelectric capacitor and the FET of the memory cell, generated during the write and read operations are automatically discharged through a resistor since the resistor is included as a discharge path between the contact point of the ferroelectric capacitor and the FET of the memory unit cell and the grounding point. Accordingly, the function of turning on and off the discharge path for discharging the pyroelectric charges is not necessary and the polarization turbulence due to the pyroelectric charges is not generated.

Abstract translation: 提供一种具有用于稳定地放电在铁电电容器中产生的热电荷而不影响写入和读取操作的放电电路的铁电随机存取存储器。 在具有根据本发明的放电电路的铁电随机存取存储器中，在写和读操作期间产生的存储单元的铁电电容器和FET之间的热电荷通过电阻器自动放电，因为电阻器被包括为 在强电介质电容器的接触点与存储单元电池的FET之间的放电路径和接地点。 因此，不需要对排出热电荷的放电路径进行导通和关闭的功能，并且不产生由于热电荷引起的极化湍流。

公开(公告)号：US5740100A

公开(公告)日：1998-04-14

申请号：US539469

申请日：1995-10-05

Applicant: In-Kyeong Yoo

Inventor： In-Kyeong Yoo

IPC: G11C11/22

CPC classification number: G11C11/22

Abstract: Polarization loss in ferroelectric capacitors can be prevented by consecutively applying partial switching pulses to an imprinted ferroelectric capacitor, which is able to achieve a certain polarization state and the zero polarization state simultaneously, under the condition of utilizing the bistable polarization states as memory logic. This effects an improvement in both the fatigue properties and life expectancy of ferroelectric capacitors.

Abstract translation: 通过在利用双稳态极化状态作为存储器逻辑的条件下，能够将部分切换脉冲连续施加到能够实现一定极化状态和零极化状态的压印铁电电容器，可以防止铁电电容器的极化损失。 这样可以提高铁电电容器的疲劳性能和寿命。