公开(公告)号：US20060086966A1

公开(公告)日：2006-04-27

申请号：US11296510

申请日：2005-12-08

Applicant: In-kyeong Yoo ,  Byong-man Kim

Inventor： In-kyeong Yoo ,  Byong-man Kim

IPC: H01L29/76

CPC classification number: B82Y10/00 ,  G11C2216/08 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/7881

Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.

公开(公告)号：US06999346B2

公开(公告)日：2006-02-14

申请号：US10774456

申请日：2004-02-10

Applicant: In-kyeong Yoo ,  Byong-man Kim

Inventor： In-kyeong Yoo ,  Byong-man Kim

IPC: G11C13/07

CPC classification number: B82Y10/00 ,  G11C2216/08 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/7881

Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.

公开(公告)号：US07407856B2

公开(公告)日：2008-08-05

申请号：US11296510

申请日：2005-12-08

Applicant: In-kyeong Yoo ,  Byong-man Kim

Inventor： In-kyeong Yoo ,  Byong-man Kim

IPC: H01L21/336

CPC classification number: B82Y10/00 ,  G11C2216/08 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/7881

Abstract: A method of manufacturing a memory device includes defining a field region and an active region in a substrate, forming a field oxide layer on the field region, forming an insulating layer on the active region, patterning the insulating layer to form first and second bit lines separated from and parallel to each other on the active region, forming a memory element for storing data in a nonvolatile state, wherein the memory element passes across the first and second bit lines, and forming a word line on the insulating layer and the memory element.

Abstract translation: 一种制造存储器件的方法包括在衬底中限定场区域和有源区域，在场区域上形成场氧化物层，在有源区域上形成绝缘层，图案化绝缘层以形成第一和第二位线 形成用于将数据存储在非易失性状态的存储元件，其中存储元件穿过第一和第二位线，并在绝缘层和存储元件上形成字线 。

公开(公告)号：US06740925B2

公开(公告)日：2004-05-25

申请号：US10041469

申请日：2002-01-10

Applicant: In-kyeong Yoo ,  Byong-man Kim

Inventor： In-kyeong Yoo ,  Byong-man Kim

IPC: H01L2976

CPC classification number: B82Y10/00 ,  G11C2216/08 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/7881

Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.

Abstract translation: 提供了包括具有RAM和ROM功能的单个晶体管的存储器件及其操作和制造方法。 存储器件包括形成在衬底上的单个晶体管。 晶体管可以是具有带非易失性存储元件的栅极的存储晶体管，或者在晶体管和衬底之间提供非易失性存储元件。

公开(公告)号：US06687210B2

公开(公告)日：2004-02-03

申请号：US10090629

申请日：2002-03-06

Applicant: In-kyeong Yoo ,  Won-bong Choi ,  Byong-man Kim

Inventor： In-kyeong Yoo ,  Won-bong Choi ,  Byong-man Kim

IPC: G11B700

CPC classification number: G11B11/08 ,  G11B9/08 ,  G11B13/00

Abstract: A high-density information storage apparatus using electron emission and methods of writing, reading and erasing information using the same are provided. The high-density information storage apparatus includes a lower electrode, a photoconductive layer and a recording medium sequentially provided on the lower electrode, a conductive layer converting unit for making the photoconductive layer conductive, a data write and read unit for writing data to the recording medium or reading data from the recording medium, a data loss preventing unit for preventing loss of data during data write and read operations, and a power supply connected to the lower electrode and the data write and read unit, for supplying voltage necessary for reading and writing data.

Abstract translation: 提供了使用电子发射的高密度信息存储装置和使用其的写入，读取和擦除信息的方法。 高密度信息存储装置包括下电极，光电导层和顺序地设置在下电极上的记录介质，用于使光电导层导通的导电层转换单元，用于将数据写入记录的数据写入和读取单元 介质或从记录介质读取数据，数据丢失防止单元，用于防止数据写入和读取操作期间的数据丢失，以及连接到下部电极和数据写入和读取单元的电源，用于提供读取所需的电压 写数据

公开(公告)号：US06867999B2

公开(公告)日：2005-03-15

申请号：US10776233

申请日：2004-02-12

Applicant: In-kyeong Yoo ,  Byong-man Kim

Inventor： In-kyeong Yoo ,  Byong-man Kim

IPC: G11C11/412 ,  G11C16/04 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792 ,  G11C7/00

CPC classification number: B82Y10/00 ,  G11C2216/08 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/7881

Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.

Abstract translation: 提供了包括具有RAM和ROM功能的单个晶体管的存储器件及其操作和制造方法。 存储器件包括形成在衬底上的单个晶体管。 晶体管可以是具有带非易失性存储元件的栅极的存储晶体管，或者在晶体管和衬底之间提供非易失性存储元件。

公开(公告)号：US08164130B2

公开(公告)日：2012-04-24

申请号：US10852287

申请日：2004-05-25

Applicant: Sun-ae Seo ,  In-kyeong Yoo ,  Myoung-jae Lee ,  Wan-jun Park

Inventor： Sun-ae Seo ,  In-kyeong Yoo ,  Myoung-jae Lee ,  Wan-jun Park

IPC: G11C11/34

CPC classification number: G11C13/0007 ,  G11C2213/32 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146

Abstract: A nonvolatile memory device including one transistor and one resistant material and a method of manufacturing the nonvolatile memory device are provided. The nonvolatile memory device includes a substrate, a transistor formed on the substrate, and a data storage unit connected to a drain of the transistor. The data storage unit includes a data storage material layer having different resistance characteristics in different voltage ranges.

公开(公告)号：US08043926B2

公开(公告)日：2011-10-25

申请号：US12926042

申请日：2010-10-22

Applicant: Sung-Il Cho ,  Choong-rae Cho ,  Eun-hong Lee ,  In-kyeong Yoo

Inventor： Sung-Il Cho ,  Choong-rae Cho ,  Eun-hong Lee ,  In-kyeong Yoo

IPC: H01L21/02

CPC classification number: H01L27/115 ,  G11C13/0007 ,  G11C2213/32 ,  G11C2213/51 ,  H01L27/112 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146

Abstract: A nonvolatile memory device includes at least one switching device and at least one storage node electrically connected to the at least one switching device. The at least one storage node includes a lower electrode, one or more oxygen-deficient metal oxide layers, one or more data storage layers, and an upper electrode. At least one of the one or more metal oxide layers is electrically connected to the lower electrode. At least one of the one or more data storage layers is electrically connected to at least one of the one or more metal oxide layers. The upper electrode is electrically connected to at least one of the one or more data storage layers. A method of manufacturing the nonvolatile memory device includes preparing the at least one switching device and forming the lower electrode, one or more metal oxide layers, one or more data storage layers, and upper electrode.

公开(公告)号：US07901586B2

公开(公告)日：2011-03-08

申请号：US11882112

申请日：2007-07-30

Applicant: In-kyeong Yoo ,  Soo-hwan Jeong ,  Sun-ae Seo ,  In-sook Kim

Inventor： In-kyeong Yoo ,  Soo-hwan Jeong ,  Sun-ae Seo ,  In-sook Kim

IPC: B44C1/22 ,  H01L21/302

CPC classification number: B82B3/00 ,  B29C59/022 ,  B29C59/026 ,  B29C2059/023 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  H01L21/32139

Abstract: A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.

Abstract translation: 提供一种制造纳米通道阵列的方法和使用纳米通道阵列制造纳米点的方法。 纳米通道阵列制造方法包括：执行第一阳极氧化以形成具有由铝基板上的多个空腔形成的沟道阵列的第一氧化铝层; 将第一氧化铝层蚀刻到预定深度并在铝基板上形成多个凹部，其中每个凹部对应于第一氧化铝层的每个通道的底部; 以及进行第二阳极氧化以形成具有与所述铝基板上的所述多个凹部对应的多个通道的阵列的第二氧化铝层。 阵列制造方法使得可以使用空腔获得精细排列的空腔并形成纳米级点。

公开(公告)号：US20090045450A1

公开(公告)日：2009-02-19

申请号：US11976250

申请日：2007-10-23

Applicant: June-mo Koo ,  Suk-pil Kim ,  Young-gu Jin ,  Won-joo Kim ,  In-kyeong Yoo ,  Yoon-dong Park

Inventor： June-mo Koo ,  Suk-pil Kim ,  Young-gu Jin ,  Won-joo Kim ,  In-kyeong Yoo ,  Yoon-dong Park

IPC: H01L29/788 ,  H01L21/336

CPC classification number: H01L29/66825 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7881

Abstract: Provided are a non-volatile memory device, which may have higher integration density, improved or optimal structure, and/or reduce or minimize interference between adjacent cells without using an SOI substrate, and a method of fabricating the non-volatile memory device. The non-volatile memory device may include: a semiconductor substrate comprising a body, and a pair of fins protruding from the body; a buried insulating layer filling between the pair of fins; a pair of floating gate electrodes on outer surfaces of the pair of fins to a height greater than that of the pair of fins; and a control gate electrode on the pair of floating gate electrodes.

Abstract translation: 提供了一种非易失性存储器件，其可以具有更高的集成密度，改进的或最优的结构，和/或减少或最小化相邻单元之间的干扰而不使用SOI衬底，以及制造非易失性存储器件的方法。 非易失性存储器件可以包括：半导体衬底，其包括主体和从主体突出的一对鳍; 埋在绝缘层之间的一对散热片; 一对浮栅电极，其在所述一对翅片的外表面上的高度大于所述一对鳍片的高度; 以及一对浮栅上的控制栅电极。