System and method for face tracking
    121.
    发明授权
    System and method for face tracking 有权
    面部跟踪的系统和方法

    公开(公告)号:US08855360B2

    公开(公告)日:2014-10-07

    申请号:US12492538

    申请日:2009-06-26

    Inventor: Ben-Zion Shaick

    CPC classification number: G06K9/00255 G06K9/00295

    Abstract: Improved face tracking is provided during determination of an image by an imaging device using a low power face tracking unit. In one embodiment, image data associated with a frame and one or more face detection windows from a face detection unit may be received by the face tracking unit. The face detection windows are associated with the image data of the frame. A face list may be determined based on the face detection windows and one or more faces may be selected from the face list to generate an output face list. The output face list may then be provided to a processor of an imaging device for the detection of an image based on at least one of coordinate and scale values of the one or more faces on the output face list.

    Abstract translation: 在使用低功率脸部跟踪单元的成像装置确定图像期间提供改进的面部跟踪。 在一个实施例中,面部跟踪单元可以接收与人脸检测单元相关联的帧和一个或多个面部检测窗口的图像数据。 脸部检测窗口与帧的图像数据相关联。 可以基于面部检测窗口确定面部列表,并且可以从面部列表中选择一个或多个面部以生成输出面部列表。 然后可以基于输出面列表上的一个或多个面的坐标和比例值中的至少一个将输出面列表提供给成像装置的处理器,以便检测图像。

    METHOD AND APPARATUS FOR SUPPORTING TARGET-SIDE SECURITY IN A CACHE COHERENT SYSTEM
    122.
    发明申请
    METHOD AND APPARATUS FOR SUPPORTING TARGET-SIDE SECURITY IN A CACHE COHERENT SYSTEM 有权
    用于支持高速缓存系统中目标端安全的方法和装置

    公开(公告)号:US20140149687A1

    公开(公告)日:2014-05-29

    申请号:US13686604

    申请日:2012-11-27

    Abstract: A cache coherency controller, a system comprising such, and a method of its operation are disclosed. The coherency controller ensures that target-side security checking rules are not violated by the performance-improving processes commonly used in coherency controllers such as dropping, merging, invalidating, forwarding, and snooping. This is done by ensuring that requests marked for target-side security checking and any other requests to overlapping addresses are forwarded directly to the target-side security filter without modification or side effects.

    Abstract translation: 公开了一种高速缓存一致性控制器,包括该系统的系统及其操作方法。 一致性控制器确保目标端安全检查规则不被一致性控制器中通常使用的性能改进流程(如丢弃,合并,无效,转发和侦听)所违反。 这是通过确保标记为目标端安全检查的请求和任何其他重叠地址的请求直接转发到目标端安全过滤器而不进行修改或副作用。

    BOOTSTRAPPING PROGRAM SYNTHESIS LANGUAGE MODELS TO PERFORM REPAIRING

    公开(公告)号:US20250068547A1

    公开(公告)日:2025-02-27

    申请号:US18455992

    申请日:2023-08-25

    Abstract: Certain aspects of the present disclosure provide techniques and apparatus for improved program synthesis using machine learning. An input indicating a programming task is accessed. A generated program is generated based on processing the input using a trained machine learning model. In response to determining that the generated program failed to satisfy the programming task, feedback is generated, and a revised program is generated based on processing the feedback using the trained machine learning model. In response to determining that the revised program satisfied the programming task, one or more parameters of the trained machine learning model are updated based on the revised program.

    PIEZOELECTRIC MEMS CONTACT DETECTION SYSTEM

    公开(公告)号:US20250056164A1

    公开(公告)日:2025-02-13

    申请号:US18718427

    申请日:2023-03-02

    Abstract: Systems, devices, methods, and implementations related to contact detection are described herein. In one aspect, a system is provided. The system includes a first piezoelectric microelectromechanical systems (MEMS) transducer coupled to configured to generate a first analog signal when the first analog signal is transduced from vibrations propagating through the object. The system includes a second piezoelectric MEMS transducer having configured to generate a second analog signal transduced from acoustic vibrations at a location of the object, and classification circuitry coupled to the output of first piezoelectric MEMS transducer and the output of the second piezoelectric MEMS transducer, where the classification circuitry is configured to process data from the first analog signal and data from the second analog signal, and to categorize combinations of the first analog signal and the second analog signal received during one or more time frames.

    COMPRESSED GEOMETRY RENDERING AND STREAMING

    公开(公告)号:US20240412459A1

    公开(公告)日:2024-12-12

    申请号:US18740698

    申请日:2024-06-12

    Abstract: The present disclosure relates to methods and apparatus for graphics processing. The apparatus may identify at least one mesh associated with at least one frame. The apparatus may also divide the at least one mesh into a plurality of groups of primitives, each of the plurality of groups of primitives including at least one primitive and a plurality of vertices. The apparatus may also compress the plurality of groups of primitives into a plurality of groups of compressed primitives, the plurality of groups of compressed primitives being associated with random access. Additionally, the apparatus may decompress the plurality of groups of compressed primitives, at least one first group of the plurality of groups of compressed primitives being decompressed in parallel with at least one second group of the plurality of groups of compressed primitives.

    Batch Softmax For 0-Label And Multilabel Classification

    公开(公告)号:US20240303477A1

    公开(公告)日:2024-09-12

    申请号:US17754906

    申请日:2020-11-16

    CPC classification number: G06N3/08

    Abstract: Embodiments include methods, and processing devices for implementing the methods. Various embodiments may include calculating a batch softmax normalization factor using a plurality of logit values from a plurality of logits of a layer of a neural network, normalizing the plurality of logit values using the batch softmax normalization factor, and mapping each of the normalized plurality of logit values to one of a plurality of manifolds in a coordinate space. In some embodiments, each of the plurality of manifolds represents a number of labels to which a logit can be classified. In some embodiments, at least one of the plurality of manifolds represents a number of labels other than one label.

    Transducer built-in self-test
    129.
    发明授权

    公开(公告)号:US11913988B2

    公开(公告)日:2024-02-27

    申请号:US17741246

    申请日:2022-05-10

    Inventor: Michael Carfore

    Abstract: An apparatus for testing a transducer module includes a test signal generator coupled to a common-mode terminal common to a plurality of transducers, and a signal processing circuit configured to receive output signal from each of said transducers and to produce an output signal. If the transducers are well matched to one another, the output signal will have little or no output amplitude. If there is a mismatch between the transducers, however, the output signal will have an amplitude proportional to the mismatch. The amplitude of the output signal may be compared to a predetermined threshold in order to produce a mismatch output signal indicating the existence of, and/or the degree of, mismatch between the transducers.

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