公开(公告)号：US06610579B2

公开(公告)日：2003-08-26

申请号：US09842229

申请日：2001-04-26

Applicant: Jun Lin ,  Masaaki Nakabayashi

Inventor： Jun Lin ,  Masaaki Nakabayashi

IPC: H01L2120

CPC classification number: H01L28/60 ,  H01L21/31604

Abstract: A high-dielectric capacitor is formed by using a Ru lower electrode having a (002)-oriented principal surface, by depositing thereon a Ta2O5 film such that the Ta2O5 film has a (100)-principal surface.

Abstract translation: 通过使用具有（002）取向主表面的Ru下电极，通过在其上沉积Ta 2 O 5膜使得Ta 2 O 5膜具有（100） - 主表面而形成高介电电容器。

公开(公告)号：US06602756B2

公开(公告)日：2003-08-05

申请号：US09735477

申请日：2000-12-14

Applicant: Jun Lin ,  Hiroshi Minakata ,  Akihiro Shimada ,  Toshiya Suzuki ,  Daisuke Matsunaga

Inventor： Jun Lin ,  Hiroshi Minakata ,  Akihiro Shimada ,  Toshiya Suzuki ,  Daisuke Matsunaga

IPC: H01L2120

CPC classification number: H01L28/91 ,  H01L27/10852 ,  H01L28/55 ,  H01L28/60

Abstract: A method of manufacturing a semiconductor device has the steps of: (a) forming a lower electrode made of rare metal above a semiconductor substrate; (b) depositing a capacitor dielectric film made of a high dielectric material or ferroelectric oxide on the lower electrode; (c) forming a laminated layer on the capacitor dielectric film, the laminated layer including an upper electrode layer made of rare metal and an adhesive layer with or without an SiO2 mask layer thereon; (d) patterning the laminated layer; (e) chemically processing the patterned, laminated layer to remove a surface layer of the laminated layer; and (f) forming an interlayer insulating film over the semiconductor substrate, covering the chemically processed, laminated layer. An adhesion force between the rare metal layer and insulating layer can be increased.

Abstract translation: 制造半导体器件的方法具有以下步骤：（a）在半导体衬底上形成由稀有金属制成的下电极; （b）在下电极上沉积由高介电材料或铁电氧化物制成的电容器电介质膜; （c）在电容器电介质膜上形成叠层，层叠层包括由稀有金属制成的上电极层和其上具有或不具有SiO 2掩模层的粘合剂层; （d）图案化层叠层; （e）化学处理图案化的层压层以去除层压层的表面层; 和（f）在半导体衬底上形成层间绝缘膜，覆盖化学处理层压层。 可以增加稀土金属层与绝缘层之间的粘附力。

公开(公告)号：US06593180B1

公开(公告)日：2003-07-15

申请号：US09708044

申请日：2000-11-08

Applicant: Jun Lin ,  Yoshiaki Fukuzumi

Inventor： Jun Lin ,  Yoshiaki Fukuzumi

IPC: H01L218242

CPC classification number: H01L27/11502 ,  H01L27/1085 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/65

Abstract: A method of manufacturing semiconductor device comprises the step of forming the transistor in the semiconductor substrate, the step of forming the capacitor conducting to the transistor, and the step of forming the insulating film to cover the transistor and the capacitor; and the step of sintering the semiconductor substrate in an atmosphere including the mixture of hydrogen, nitrogen and oxygen gases.

Abstract translation: 制造半导体器件的方法包括在半导体衬底中形成晶体管的步骤，形成对晶体管导通的电容器的步骤以及形成绝缘膜以覆盖晶体管和电容器的步骤; 以及在包括氢，氮和氧气的混合气体的气氛中烧结半导体衬底的步骤。

公开(公告)号：US06423590B2

公开(公告)日：2002-07-23

申请号：US09846538

申请日：2001-05-02

Applicant: Jun-Lin Tsai ,  Ruey-Hsin Lin ,  Jei-Feng Hwang ,  Kuo-Chio Liu

Inventor： Jun-Lin Tsai ,  Ruey-Hsin Lin ,  Jei-Feng Hwang ,  Kuo-Chio Liu

IPC: H01L2100

CPC classification number: H01L29/66272 ,  H01L29/0821 ,  H01L29/7322

Abstract: A new design for a high voltage bipolar transistor is disclosed. Instead of a buried subcollector (which would be N+ in an NPN device), a buried P+ layer is used. The presence of this P+ layer results in pinch-off between itself and the bipolar base. This allows much higher breakdown voltages to be achieved. In particular, the device will not break down at the bottom of the base-collector junction which is the weak spot for conventional devices. A process for manufacturing this device is described. A particular feature of this new process is that the N type epitaxial layer that is grown over the P+ layer is only about half the thickness of its counterpart in the conventional device. The process is fully compatible with conventional BiCMOS processes and has lower cost.

Abstract translation: 公开了一种用于高电压双极晶体管的新设计。 代替埋置的子集电极（在NPN器件中将为N +），使用掩埋的P +层。 该P +层的存在导致其本身和双极基底之间的夹断。 这样可以实现更高的击穿电压。 特别地，该装置不会在作为常规装置的弱点的基极 - 集电极结的底部分解。 对该装置的制造方法进行说明。 这个新工艺的一个特点是在P +层上生长的N型外延层只是传统器件中其对应厚度的大约一半。 该工艺与传统的BiCMOS工艺完全兼容，成本较低。

公开(公告)号：US06291304B1

公开(公告)日：2001-09-18

申请号：US09396520

申请日：1999-09-15

Applicant: Jun-Lin Tsaz ,  Ruey-Hsin Liu ,  Jyh-Min Jiang ,  Jei-Feng Hwang

Inventor： Jun-Lin Tsaz ,  Ruey-Hsin Liu ,  Jyh-Min Jiang ,  Jei-Feng Hwang

IPC: H01L21331

CPC classification number: H01L29/66272 ,  H01L29/0821 ,  H01L29/7392

Abstract: A new design for a high voltage bipolar transistor is disclosed. Instead of a buried subcollector (which would be N+ in an NPN device)d a buried P+ layer is used. The presence of this P+ layer results in pinch-off between itself and the bipolar base. This allows much higher breakdown voltages to be achieved. In particular, the device will not break down at the bottom of the base-collector junction which is the weak spot for conventional devices. A process for manufacturing this device is described. A particular feature of this new process is that the N type epitaxial layer that is grown over the P+ layer is only about half the thickness of its counterpart in the conventional device. The process is fully compatible with conventional BiCMOS processes and has lower cost.

Abstract translation: 公开了一种用于高电压双极晶体管的新设计。 代替掩埋子集电极（在NPN器件中将为N +）d使用掩埋的P +层。 该P +层的存在导致其本身和双极基底之间的夹断。 这样可以实现更高的击穿电压。 特别地，该装置不会在作为常规装置的弱点的基极 - 集电极结的底部分解。 对该装置的制造方法进行说明。 这个新工艺的一个特点是在P +层上生长的N型外延层只是传统器件中其对应厚度的大约一半。 该工艺与传统的BiCMOS工艺完全兼容，成本较低。

公开(公告)号：US06249040B1

公开(公告)日：2001-06-19

申请号：US09450509

申请日：1999-11-30

Applicant: Jun Lin ,  Masaaki Nakabayashi

Inventor： Jun Lin ,  Masaaki Nakabayashi

IPC: H01L2900

CPC classification number: H01L28/60 ,  H01L21/31604

Abstract: A high-dielectric capacitor is formed by using a Ru lower electrode having a (002)-oriented principal surface, by depositing thereon a Ta2O5 film such that the Ta2O5 film has a (100)-principal surface.

Abstract translation: 通过使用具有（002）取向主表面的Ru下电极，通过在其上沉积Ta 2 O 5膜使得Ta 2 O 5膜具有（100） - 主表面而形成高介电电容器。

公开(公告)号：US06211028B1

公开(公告)日：2001-04-03

申请号：US09245560

申请日：1999-02-05

Applicant: Jun-Lin Tsai ,  Ruey-Hsing Liu ,  Chiou-Shian Peng ,  Kuo-Chio Liu

Inventor： Jun-Lin Tsai ,  Ruey-Hsing Liu ,  Chiou-Shian Peng ,  Kuo-Chio Liu

IPC: H01L21331

CPC classification number: H01L29/66272 ,  H01L29/1004 ,  H01L29/732

Abstract: A bipolar transistor is described whose I-V curve is such that it operates in two regions, one having low gain and low power consumption and another having higher gain and better current driving ability. Said transistor has a base region made up of two sub regions, the region closest to the emitter having a resistivity about an order a magnitude lower than the second region (which interfaces with the collector). A key feature of the invention is that the region closest to the collector is very uniformly doped, i.e. there is no gradient or built-in field present. In order to produce such a region, epitaxial growth along with boron doping is used rather than more conventional techniques such as ion implantation and/or diffusion.

Abstract translation: 描述了一种双极性晶体管，其I-V曲线使得其工作在两个区域中，一个具有低增益和低功耗，另一个具有较高的增益和更好的电流驱动能力。 所述晶体管具有由两个子区域构成的基极区域，最靠近发射极的区域的电阻率大约低于第二区域（与集电极接口）的数量级。 本发明的关键特征是最靠近集电极的区域是非常均匀的掺杂的，即没有梯度或内置的场存在。 为了制造这样的区域，使用外延生长以及硼掺杂，而不是诸如离子注入和/或扩散的更常规的技术。

公开(公告)号：US6148988A

公开(公告)日：2000-11-21

申请号：US229675

申请日：1999-01-13

Applicant: Wei-Jun Lin ,  Hsiang-Feng Huang ,  Kuan-Wen Chen

Inventor： Wei-Jun Lin ,  Hsiang-Feng Huang ,  Kuan-Wen Chen

IPC: B23Q7/14 ,  B65G29/00

CPC classification number: B23Q7/1431

Abstract: An automatic pallet changer is composed of a pallet lifting mechanism and a revolving mechanism. The pallet lifting mechanism has a pallet platform and a lifting rod which is fastened with the bottom of the pallet platform. The pallet platform and the lifting rod are driven by oil pressure to move up and down in a linear manner. The body of the lifting rod is provided with a vertically-oriented first position confining portion. The revolving mechanism has a gear and a rack gear member. The gear is pivoted to the bottom of the pallet lifting mechanism at a fixed height and provided axially with a slide channel in which the lifting rod is slidably disposed. The slide channel is provided in the inside thereof with a vertically-oriented second position confining portion, which is complementary in shape to the first position confining portion of the lifting rod for enabling the lifting rod and the pallet platform to turn synchronously. The rack gear member is engaged with the gear so as to drive the gear to rotate.

Abstract translation: 自动托盘更换器由托盘提升机构和旋转机构组成。 托盘提升机构具有托盘平台和与托盘平台的底部紧固的提升杆。 托盘平台和提升杆由油压驱动，以线性方式上下移动。 提升杆的主体设置有垂直取向的第一位置限制部。 旋转机构具有齿轮和齿条构件。 齿轮以固定高度枢转到托盘提升机构的底部，并且轴向地设置有滑动通道，提升杆可滑动地设置在该滑动通道中。 滑动通道在其内部设置有垂直定向的第二位置限制部分，其在形状上与提升杆的第一位置限制部分互补，以使提升杆和托盘平台能够同步地旋转。 齿条构件与齿轮啮合以驱动齿轮旋转。

公开(公告)号：US20160079001A1

公开(公告)日：2016-03-17

申请号：US14121487

申请日：2014-09-12

Applicant: Yi-jun Lin ,  Bor Z Jang ,  Shaio-Yen Lee ,  Aruna Zhamu

Inventor： Yi-jun Lin ,  Bor Z Jang ,  Shaio-Yen Lee ,  Aruna Zhamu

IPC: H01G4/008 ,  C01B31/04 ,  C04B35/465 ,  H01G4/12

CPC classification number: H01G4/008 ,  B32B18/00 ,  C01B32/182 ,  C04B35/4682 ,  C04B35/6261 ,  C04B35/62675 ,  C04B35/62685 ,  C04B35/62695 ,  C04B35/634 ,  C04B35/638 ,  C04B2235/3215 ,  C04B2235/3217 ,  C04B2235/3224 ,  C04B2235/3227 ,  C04B2235/3236 ,  C04B2235/3244 ,  C04B2235/3262 ,  C04B2235/3272 ,  C04B2235/3275 ,  C04B2235/3279 ,  C04B2235/3281 ,  C04B2235/3284 ,  C04B2235/3418 ,  C04B2235/442 ,  C04B2235/6025 ,  C04B2235/6582 ,  C04B2235/79 ,  C04B2237/346 ,  C04B2237/68 ,  C04B2237/704 ,  H01G4/1227 ,  H01G4/1245 ,  H01G4/1254

Abstract: A ceramic capacitor comprising at least a dielectric ceramic layer and at least a graphene electrode layer deposited on the ceramic layer, wherein the graphene electrode layer has a thickness no less than 2 nm and consists of a graphene material or a graphene composite material containing at least 0.1% by weight of a graphene material dispersed in a matrix material or bonded by a binder material, wherein the graphene material is selected from (a) a plurality of single-layer or multi-layer pristine graphene sheets having less than 0.01% by weight of non-carbon elements, or (b) one or a plurality of a non-pristine graphene material having at least 0.01% by weight of non-carbon elements, wherein the non-pristine graphene is selected from graphene oxide, reduced graphene oxide, graphene fluoride, graphene chloride, graphene bromide, graphene iodide, hydrogenated graphene, nitrogenated graphene, doped graphene, chemically functionalized graphene, or a combination thereof.

Abstract translation: 一种陶瓷电容器，其至少包括介电陶瓷层和至少沉积在所述陶瓷层上的石墨烯电极层，其中所述石墨烯电极层具有不小于2nm的厚度，并且由至少包含石墨烯材料或石墨烯复合材料组成 分散在基质材料中或通过粘合剂材料粘合的石墨烯材料0.1重量％，其中石墨烯材料选自（a）多个单层或多层原始石墨烯片，其具有小于0.01重量％ 的非碳元素，或（b）一种或多种非原始石墨烯材料，其具有至少0.01重量％的非碳元素，其中所述非原始石墨烯选自氧化石墨烯，氧化还原的氧化石墨烯， 石墨烯氟化物，氯化石墨烯，溴化石墨烯，碘化石墨烯，氢化石墨烯，含氮石墨烯，掺杂石墨烯，化学官能化石墨烯或其组合。

公开(公告)号：US20160026846A1

公开(公告)日：2016-01-28

申请号：US14121023

申请日：2014-07-22

Applicant: Yi-jun Lin ,  Bor Z Jang ,  Shaio-Yen Lee ,  Aruna Zhamu

Inventor： Yi-jun Lin ,  Bor Z Jang ,  Shaio-Yen Lee ,  Aruna Zhamu

IPC: G06K9/00 ,  H01L21/283

CPC classification number: G06K9/00053 ,  G06K9/0002

Abstract: A flexible fingerprint sensor laminate comprising: a layer of flexible substrate having a front surface and a back surface, at least a domain of electrically conductive material deposited on the front surface, a protective hard coating layer that covers the domain of electrically conductive material, and a plurality of sensor electrodes deposited preferably on the back surface and related circuitry (e.g. integrated circuit for driving and sensing). Preferably, the layer of flexible substrate is no greater than 20 μm in thickness, the domain of electrically conductive material has a thickness no greater than 2 μm, the protective hard coating has a thickness no greater than 1 μm, and the laminate has a surface sheet resistance no greater than 200 Ohm per square and surface scratch resistance no less than 3 H. The laminate exhibits good scratch resistance, low sheet resistance, good flexibility and mechanical integrity. The invention also provides a biometric sensor, such as a fingerprint sensor. The invention further provides a process for producing such a sensor laminate.

Abstract translation: 一种柔性指纹传感器层叠体，包括：具有前表面和后表面的柔性基底层，至少沉积在前表面上的导电材料的区域，覆盖导电材料区域的保护性硬涂层，以及 多个优选地沉积在背面上的传感器电极和相关电路（例如用于驱动和检测的集成电路）。 优选地，柔性基板的厚度不大于20μm，导电材料的区域的厚度不大于2μm，保​​护性硬涂层的厚度不大于1μm，层压体的表面 薄层电阻不大于200欧姆/平方，表面耐刮擦性不低于3赫兹。该层压板具有良好的耐刮擦性，低的薄层电阻，良好的柔韧性和机械的完整性。 本发明还提供了诸如指纹传感器的生物测定传感器。 本发明还提供了一种用于制造这种传感器层叠体的方法。