公开(公告)号：US20210271402A1

公开(公告)日：2021-09-02

申请号：US17324121

申请日：2021-05-19

Applicant: Silicon Motion, Inc.

Inventor： Tsung-Chieh Yang ,  Chun-Chieh Kuo ,  Ching-Hui Lin ,  Yang-Chih Shen

IPC: G06F3/06 ,  G06F12/02 ,  G11C11/56

Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.

公开(公告)号：US11108408B2

公开(公告)日：2021-08-31

申请号：US16835906

申请日：2020-03-31

Applicant: Silicon Motion, Inc.

Inventor： Shiuan-Hao Kuo

IPC: H03M13/00 ,  H03M13/11 ,  H03M13/15 ,  H03M13/29

Abstract: A memory controller for use in a data storage device is provided. The memory controller includes a variable-node circuit and a check-node circuit. The check-node circuit is configured to obtain a codeword difference from the variable-node circuit, and calculate a syndrome according to the codeword difference. During each LDPC (low-density parity check) decoding iterative operation, the variable-node circuit executes the following steps: determining syndrome weight according to a channel value and the syndrome from the check-node circuit; obtaining a previous codeword generated by a previous LDPC decoding iterative operation; determining a flipping strategy of a bit-flipping algorithm for each codeword bit in the previous codeword according to the syndrome weight and a predetermined threshold, and flipping one or more codeword bits in the previous codeword according to the flipping strategy to generate an updated codeword; and subtracting the previous codeword from the updated codeword to generate the codeword difference.

公开(公告)号：US20210249099A1

公开(公告)日：2021-08-12

申请号：US17037795

申请日：2020-09-30

Applicant: Silicon Motion, Inc.

Inventor： SHENG-YUAN HUANG

IPC: G11C29/00 ,  G11C16/10

Abstract: A method for selecting bad columns in a data storage medium is provided. The data storage medium is coupled to a control unit, and the data storage medium includes data blocks, wherein each of the data blocks includes columns. The columns are divided into chunks. The method for selecting bad columns in the data storage medium includes following steps. (a) The control unit calculates a number of bad columns in each of the chunks to sorts the chunks, wherein the bad columns are selected from the columns. (b) The control unit sequentially marks or records the bad columns in each of the chunks with bad column groups, wherein a bad column position and a bad column number in each of the chunks are marked or recorded in each of the bad column groups.

公开(公告)号：US11070403B1

公开(公告)日：2021-07-20

申请号：US16944986

申请日：2020-07-31

Applicant: Silicon Motion, Inc.

Inventor： Fu-Jen Shih

IPC: H04L25/03 ,  H04L1/00

Abstract: The invention introduces a non-transitory computer program product for adjusting equalization when executed by a processing unit of a storage device. The non-transitory computer program product includes program code to: repeatedly adjust a parameter of an equalizer after a symbol decoding error is detected until an adjustment failure is detected or successive waveforms output from the equalizer belong to an eye open state.

公开(公告)号：US11068201B2

公开(公告)日：2021-07-20

申请号：US16721931

申请日：2019-12-20

Applicant: Silicon Motion, Inc.

Inventor： Wen-Sheng Lin

IPC: G06F3/06 ,  G06F12/02

Abstract: A flash memory controller is disclosed. The flash memory controller is configured to access a flash memory module, wherein the flash memory module includes a plurality of first blocks and a plurality of second blocks, and the flash memory controller includes a microprocessor and a read-only memory storing a program code. When the flash memory controller is powered on, when the flash memory controller is required to write data into the flash memory module, the microprocessor writes the data into the plurality of first blocks only; and the microprocessor writes subsequent data into the second blocks only when a quantity of the plurality of first blocks written by the flash memory controller after power on is greater than a threshold value.

公开(公告)号：US11068177B2

公开(公告)日：2021-07-20

申请号：US16661289

申请日：2019-10-23

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G06F3/06 ,  G06F13/16 ,  G06F12/1009

Abstract: A data storage device includes a memory device and a memory controller. The memory device includes multiple memory blocks. The memory blocks include multiple table blocks configured to store tables and multiple data blocks configured to store data. The memory controller is configured to receive a predefined command which is a command from a host device to instruct the memory controller to perform initialization of the data storage device. The initialization of the data storage device includes a plurality of processing procedures which include a first portion of processing procedures and a second portion of processing procedures. The memory controller is configured to perform the first portion of processing procedures in response to the predefined command. After the first portion of processing procedures has been finished, the memory controller is configured to notify the host device that the data storage device is ready.

公开(公告)号：US20210181996A1

公开(公告)日：2021-06-17

申请号：US17101561

申请日：2020-11-23

Applicant: Silicon Motion, Inc.

Inventor： Ting-Kuan LIN

IPC: G06F3/06

Abstract: A low-cost, high-performance data center is shown, which is in a hierarchical and heterogeneous architecture. The data center includes at least three groups of servers, providing three kinds of storage media to store three types of data. The three groups of servers are connected to each other via a computer network. For data with medium access frequency, the corresponding group of servers use multi-level cell solid-state drives as the storage media, and these particular multi-level cell solid-state drives operate in a full-disk pseudo-single-level-cell mode.

公开(公告)号：US11031087B2

公开(公告)日：2021-06-08

申请号：US16865573

申请日：2020-05-04

Applicant: Silicon Motion, Inc.

Inventor： Tsung-Chieh Yang

IPC: G11C16/26 ,  G11C16/06 ,  G11C16/34 ,  G11C16/04 ,  G11C16/16 ,  G11C16/10

Abstract: A method for reading data stored in a flash memory. The flash memory comprises a plurality of memory cells and each memory cell has a particular threshold voltage. The method includes: obtaining a first threshold voltage distribution representing threshold voltages of a first group of the memory cells; obtaining a second threshold voltage distribution representing threshold voltages of a second group of the memory cells, wherein the second threshold voltage distribution is different from the first threshold voltage distribution, and the first group of the memory cells comprises at least a part of the second group of the memory cells; and controlling the flash memory to perform at least one read operation upon the first group of the memory cells according to the second threshold voltage distribution.

公开(公告)号：US20210141537A1

公开(公告)日：2021-05-13

申请号：US17152812

申请日：2021-01-20

Applicant: Silicon Motion, Inc.

Inventor： Hsu-Ping Ou

IPC: G06F3/06

Abstract: A method of a flash controller to be coupled between a flash memory device and a host device is provided. The flash memory device has a plurality of blocks each having a plurality of pages, and the method comprises: receiving a trim/erase/unmap command from the host device; obtaining a storage space, which is to be erased, from the trim/erase/unmap command; comparing a space size of the storage space with a threshold to determine whether the space size is larger than the threshold; and resetting valid page counts of the plurality of blocks of the flash memory device when the space size is larger than the threshold.

公开(公告)号：US10990323B2

公开(公告)日：2021-04-27

申请号：US16423171

申请日：2019-05-28

Applicant: Silicon Motion Inc.

Inventor： Kuan-Hui Li

IPC: G06F3/06 ,  G06F12/0804 ,  G06F16/22 ,  G06F16/23 ,  G06F12/10

Abstract: The present invention provides a flash memory controller, where the flash memory controller includes a read-only memory, a processor and a cache, the read-only memory stores a program code, and the processor executes the program code to perform access a flash memory module. When the processor receives first data from a host, the processor stores the first data into a region of the cache, and the processor builds or updates a binary tree according to the first data, wherein the binary tree is used when the processor receives a read command from the host.