公开(公告)号：US20240206266A1

公开(公告)日：2024-06-20

申请号：US18590203

申请日：2024-02-28

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiangnan LU ,  Guangliang SHANG ,  Can ZHENG ,  Yu FENG ,  Libin LIU ,  Jie ZHANG ,  Mei LI

IPC: H10K59/131 ,  H10K59/80

CPC classification number: H10K59/131 ,  H10K59/8051

Abstract: Provided is an organic light-emitting diode display substrate, including: a source/drain layer, a planarization layer and an anode layer which are laminated in sequence, wherein the source/drain layer includes at least one pair of first signal lines; the anode layer includes a common power line, wherein the common power line is provided with vent holes; overlapping areas between two first signal lines in each pair of the first signal lines and a projection pattern of the vent hole are equal, the overlapping area being greater than 0, wherein the projection pattern of the vent hole is a pattern of an orthographic projection of the vent hole in the common power line on the source/drain layer. A display panel and a display device are also provided.

公开(公告)号：US20240177662A1

公开(公告)日：2024-05-30

申请号：US17789918

申请日：2021-06-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Libin LIU ,  Jiangnan LU ,  Shimming SHI ,  Li WANG

IPC: G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2320/0233 ,  G09G2320/0247 ,  G09G2320/066

Abstract: An array substrate and a display device are provided. The array substrate includes a plurality of pixel driving circuits, each of which includes a driving transistor, a first light emitting control transistor, a compensation transistor, a first initialization transistor and a second initialization transistor; a first electrode of the first initialization transistor and a first electrode of the first light emitting control transistor are connected to a first node; a first electrode of the second initialization transistor and a first electrode of the compensation transistor are connected to a second node, a second electrode of the first initialization transistor is configured to receive the first initialization signal, and a cathode of the light emitting element is configured to receive a first driving signal, and a difference between a potential of the first initialization signal and a potential of the first driving signal is less than 1.5V.

公开(公告)号：US20240169904A1

公开(公告)日：2024-05-23

申请号：US17788725

申请日：2021-07-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Libin LIU ,  Shiming SHI ,  Xiyu ZHAO ,  Yu FENG ,  Li WANG

IPC: G09G3/3225 ,  H10K59/121

CPC classification number: G09G3/3225 ,  H10K59/1213 ,  G09G2300/0452 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0852 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2320/0247 ,  G09G2320/045 ,  G09G2330/021

Abstract: A pixel circuit, a driving method and a display device. The pixel circuit includes a driving circuit, a first control circuit, a compensation control circuit and a first initialization circuit; the first control circuit is configured to control to connect the control end of the driving circuit and the connection node under the control of a first scan signal; the compensation control circuit is configured to control to connect the connection node and the first end of the driving circuit under the control of a second scan signal; the first initialization circuit is configured to write a first initialization voltage into the connection node under the control of an initialization control signal; the driving circuit is configured to control to connect the first end and a second end of the driving circuit under the control of a potential of the control end thereof.

公开(公告)号：US20240071312A1

公开(公告)日：2024-02-29

申请号：US17765045

申请日：2021-03-23

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guangliang SHANG ,  Jiangnan LU ,  Long HAN ,  Li WANG ,  Libin LIU ,  Xinshe YIN ,  Shiming SHI

IPC: G09G3/3266

CPC classification number: G09G3/3266 ,  G09G2310/0286 ,  G11C19/287

Abstract: A shift register circuit includes a first control sub-circuit and a first output sub-circuit. The first control sub-circuit is configured to: adjust a voltage of a first node to a turn-on voltage due to an influence of a first direct current voltage signal from a first clock signal terminal, an initial voltage signal from an initial signal terminal and a second direct current voltage signal from a second clock signal terminal; and maintain the voltage of the first node at the turn-on voltage due to an influence of a first clock signal from the first clock signal terminal and a second clock signal from the second clock signal terminal. The first output sub-circuit is configured to be turned on under a control of the turn-on voltage of the first node to transmit a first voltage signal from a first voltage terminal to a signal output terminal.

公开(公告)号：US20230360608A1

公开(公告)日：2023-11-09

申请号：US17630634

申请日：2021-03-19

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guangliang SHANG ,  Can ZHENG ,  Jiangnan LU ,  Yuhan QIAN ,  Li WANG ,  Libin LIU ,  Shiming SHI ,  Dawei WANG

IPC: G09G3/3266 ,  G11C19/28

CPC classification number: G09G3/3266 ,  G11C19/28 ,  G09G2310/0286

Abstract: A shift register unit, a method for driving a shift register unit, a gate driving circuit, and a display device are provided. The shift register unit includes: a second noise reduction control circuit. The second noise reduction control circuit includes: a first control circuit, configured to transmit a first voltage to a second noise reduction control node; a first coupling circuit, configured to store a level of the second noise reduction control node and adjust the level of the second noise reduction control node; a second coupling circuit, configured to reduce an adjustment magnitude of the first coupling circuit in case of adjusting the level of the second noise reduction control node; a transmission circuit, configured to connect the first noise reduction control node and the second noise reduction control node; and a storage circuit, configured to store the level of the first noise reduction control node.

公开(公告)号：US20230225165A1

公开(公告)日：2023-07-13

申请号：US18107991

申请日：2023-02-09

Applicant: BOE Technology Group Co., Ltd.

Inventor： Yipeng CHEN ,  Lujiang HUANGFU ,  Libin LIU

IPC: H01L51/00

CPC classification number: H10K59/131 ,  H10K59/126 ,  H10K59/1216 ,  H10K59/1213 ,  H10K59/1201

Abstract: The present disclosure provides a display panel and a method of manufacturing the same and a display device. In a sub-pixel driving circuit of the display panel, a gate electrode of a driving transistor is coupled to a second electrode of a second transistor through a fourth conductive connection portion, and a second electrode plate of a storage capacitor is coupled to a second electrode of a first transistor through a third conductive connection portion, a gate electrode of the first transistor and a gate electrode of the second transistor are respectively coupled to a gate line pattern in the corresponding sub-pixel area; orthographic projection of the gate line pattern on the substrate does not overlap orthographic projection of the third conductive connecting portion on the substrate, and/or does not overlap orthographic projection of the fourth conductive connection portion on the substrate.

公开(公告)号：US20230154402A1

公开(公告)日：2023-05-18

申请号：US17626474

申请日：2021-01-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Can ZHENG ,  Jianchao ZHU ,  Lujiang HUANGFU ,  Libin LIU ,  Shiming SHI

IPC: G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0852 ,  G09G2310/08 ,  G09G2300/0819 ,  G09G2300/0861 ,  G09G2310/0297 ,  G09G2330/021

Abstract: In a pixel driving circuit, a compensation sub-circuit is respectively coupled to a first control terminal, a control terminal and a second terminal of the driving sub-circuit; a first terminal of the first coupling sub-circuit is coupled to the control terminal of the driving sub-circuit; a first terminal of the second coupling sub-circuit is coupled to a second terminal of the first coupling sub-circuit; a first reset sub-circuit is respectively coupled to a second control terminal, the control terminal of the driving sub-circuit and an initialization signal output terminal; a second reset sub-circuit is respectively coupled to a third control terminal, a second terminal of the first coupling sub-circuit and the first level signal output terminal; a first light emitting control sub-circuit is respectively coupled to a light emitting control terminal, a second terminal of the second coupling sub-circuit and a reference signal output terminal.

公开(公告)号：US20230042603A1

公开(公告)日：2023-02-09

申请号：US17791965

申请日：2021-05-17

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lujiang HUANGFU ,  Li WANG ,  Can ZHENG ,  Libin LIU

IPC: G09G3/3258

Abstract: A pixel driving circuit includes a reset sub-circuit, a compensation sub-circuit, a light-emitting control sub-circuit and a driving sub-circuit. The reset sub-circuit is configured to transmit an initialization signal received from an initialization signal terminal to the light-emitting control sub-circuit. The fight-emitting control sub-circuit is configured to transmit the initialization signal to the first node. The compensation sub-circuit is configured to transmit the initialization signal from the first node to a second node so as to reset a voltage of the second node. The driving sub-circuit is configured to open a conductive path from a first voltage signal terminal to the initialization signal terminal during a process of resetting the voltage of the second node.

公开(公告)号：US20230031474A1

公开(公告)日：2023-02-02

申请号：US17788755

申请日：2021-06-11

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yuhan QIAN ,  Libin LIU ,  Long HAN ,  Fangxu CAO ,  Pinfan WANG ,  Yang YU ,  Wenqiang LI ,  Zubin LV ,  Li JIA

IPC: H01L51/00 ,  H01L27/32 ,  H01L51/52 ,  H01L27/12

Abstract: A flexible array substrate includes at least one stretchable region; wherein the flexible array substrate is provided with a plurality of through holes within the stretchable region, and the plurality of through holes divide the stretchable region into a pixel island area for displaying and a bridging area for signal transmission; the bridging area includes a source-drain bridging area. The flexible array substrate, in the source-drain bridging area, includes: a base substrate, a first source-drain metal layer, a first insulating material layer, a second source-drain metal layer, a second insulating material layer, and an encapsulation layer that are sequentially stacked.

公开(公告)号：US20230005415A1

公开(公告)日：2023-01-05

申请号：US17779845

申请日：2021-04-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guangliang SHANG ,  Jiangnan LU ,  Jie ZHANG ,  Libin LIU ,  Shiming SHI ,  Dawei WANG

IPC: G09G3/20

Abstract: A shift register circuit includes a denoising control sub-circuit and a denoising sub-circuit. The denoting control sub-circuit is configured to generate an alternating voltage signal according to a voltage of a first voltage terminal and a signal of a second clock signal terminal in response to a signal of a first clock signal terminal, to rectify the alternating voltage signal and then to output a signal to a first denoising control node, so that the voltage of the first denoting control node is maintained to be a voltage that enables the denoising sub-circuit to be turned on. The denoting sub-circuit is configured to denoise a scan signal output terminal in response to a voltage of the first denoising control node being the voltage that enables the denoising sub-circuit to be turned on.