公开(公告)号：US20210151621A1

公开(公告)日：2021-05-20

申请号：US16686973

申请日：2019-11-18

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Steven M. Shank ,  Vibhor Jain ,  Anthony K. Stamper ,  John J. Ellis-Monaghan ,  John J. Pekarik

IPC: H01L31/074 ,  H01L31/028 ,  H01L31/18

Abstract: Structures including a photodetector and methods of fabricating such structures. The photodetector is positioned over the top surface of the substrate. The photodetector includes a portion of a semiconductor layer comprised of a semiconductor alloy, a p-type doped region in the portion of the semiconductor layer, and an n-type doped region in the portion of the semiconductor layer. The p-type doped region and the n-type doped region converge along a p-n junction. The portion of the semiconductor layer has a first side and a second side opposite from the first side. The semiconductor alloy has a composition that is laterally graded from the first side to the second side of the portion of the semiconductor layer.

公开(公告)号：US11004878B2

公开(公告)日：2021-05-11

申请号：US16544074

申请日：2019-08-19

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. Stamper ,  Vibhor Jain ,  Steven M. Shank ,  John J. Ellis-Monaghan ,  John J. Pekarik

IPC: H01L27/144 ,  H01L29/04 ,  H01L29/165 ,  H01L29/737 ,  H01L29/06 ,  H01L29/66 ,  H01L31/02 ,  H01L31/105 ,  H01L31/18 ,  H01L31/0312 ,  G01S7/481 ,  H03F3/08

Abstract: Structures including a photodiode and methods of fabricating such structures. A substrate has a top surface, a well, and a trench extending from the top surface to the well. A photodiode is positioned in the trench. The photodiode includes an electrode that is provided by a first portion of the well. A bipolar junction transistor has an emitter that is positioned over the top surface of the substrate and a subcollector that is positioned below the top surface of the substrate. The subcollector is provided by a second portion of the well.

公开(公告)号：US20210091236A1

公开(公告)日：2021-03-25

申请号：US16790084

申请日：2020-02-13

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Qizhi Liu ,  Vibhor Jain ,  John J. Pekarik ,  Judson R. Holt

IPC: H01L29/808 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66 ,  H01L21/02 ,  H01L21/225 ,  H01L29/08

Abstract: A junction field effect transistor (JFET) structure includes a doped polysilicon gate over a channel region of a semiconductor layer. The doped polysilicon gate has a first doping type. A raised epitaxial source is on the source region of the semiconductor layer and adjacent a first sidewall of the doped polysilicon gate, and has a second doping type opposite the first doping type. A raised epitaxial drain is on the drain region of the semiconductor layer and adjacent a second sidewall of the doped polysilicon gate, and has the second doping type. A doped semiconductor region is within the channel region of the semiconductor layer and extending from the source region to the drain region, and a non-conductive portion of the semiconductor layer is within the channel region to separate the doped semiconductor region from the doped polysilicon gate.

公开(公告)号：US10931274B2

公开(公告)日：2021-02-23

申请号：US16252007

申请日：2019-01-18

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. Stamper ,  Vibhor Jain

IPC: H03K17/14 ,  G05D23/19 ,  G05D23/24 ,  G01K3/00 ,  H01C7/04

Abstract: One illustrative device includes, among other things, an active device comprising a first terminal, a first bias resistor connected to the first terminal, and a first resistor comprising a first phase transition material connected in parallel with the first bias transistor, wherein the first phase transition material exhibits a first low conductivity phase for temperatures less than a first phase transition temperature and a first high conductivity phase for temperatures greater than the first phase transition temperature.