公开(公告)号：US20220392982A1

公开(公告)日：2022-12-08

申请号：US17833926

申请日：2022-06-07

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Takayuki IKEDA ,  Satoshi SEO ,  Sachiko KAWAKAMI ,  Daiki NAKAMURA

IPC: H01L27/32 ,  G02B27/01

Abstract: A display apparatus with a high level of immersion or realistic sensation is provided. The display apparatus includes a display portion capable of full-color display, a communication portion having a wireless communication function, and a wearing portion that can be worn on a head. In an emission spectrum of blue display provided by the display portion at a first luminance, when the intensity of a first emission peak at a wavelength higher than or equal to 400 nm and lower than 500 nm is 1, the intensity of a second emission peak at a wavelength higher than or equal to 500 nm and lower than or equal to 700 nm in the emission spectrum is 0.5 or lower. The first luminance is any value higher than 0 cd/m2 and lower than 1 cd/m2.

公开(公告)号：US20220375529A1

公开(公告)日：2022-11-24

申请号：US17772740

申请日：2020-10-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Takayuki IKEDA ,  Hitoshi KUNITAKE

IPC: G11C16/26

Abstract: A low-power memory device in which a NAND flash memory and a controller are connected to each other with a short wiring, the controller and a cache memory are connected to each other with a short wiring, and signal transmission delay is small is provided. For example, the NAND flash memory is formed using a Si transistor formed with a single crystal silicon substrate. Since an OS transistor can be formed by a method such as a thin-film method, the cache memory formed using the OS memory can be stacked over the NAND flash memory. When the NAND flash memory and the cache memory are formed in one chip, the NAND flash memory and the controller can be connected to each other with a short wiring, and the controller and the cache memory can be connected to each other with a short wiring.

公开(公告)号：US20220375521A1

公开(公告)日：2022-11-24

申请号：US17773887

申请日：2020-11-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Takayuki IKEDA ,  Hitoshi KUNITAKE

IPC: G11C14/00 ,  H01L27/11582

Abstract: A computer system with a small circuit area and reduced power consumption is used. The computer system includes a computer node including a processor and a three-dimensional NAND memory device. The three-dimensional NAND memory device includes a first string and a second string in different blocks. The first string includes a first memory cell, and the second string includes a second memory cell. On reception of first data and a signal including an instruction to write the first data, the controller writes the first data to the first memory cell. Then, the controller reads the first data from the first memory cell and writes the first data to the second memory cell. Thus, the computer node can eliminate a main memory such as a DRAM from the structure.

公开(公告)号：US20220359592A1

公开(公告)日：2022-11-10

申请号：US17633242

申请日：2020-08-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Seiichi YONEDA ,  Yusuke NEGORO ,  Takayuki IKEDA ,  Shunpei YAMAZAKI

IPC: H01L27/146

Abstract: An imaging device that has an image processing function and is capable of a high-speed operation is provided. The imaging device, which has an additional function such as image processing, can retain analog data obtained by an image capturing operation in a pixel and extract data obtained by multiplying the analog data by a predetermined weight coefficient. In the imaging device, some of potentials used for an arithmetic operation in pixels are generated by redistribution of charge with which wirings are charged. This enables an arithmetic operation to be performed at high speed with low power consumption, compared with the case where the potentials are supplied from another circuit to the pixels.

公开(公告)号：US20220344654A1

公开(公告)日：2022-10-27

申请号：US17642323

申请日：2020-09-07

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Tatsuyoshi TAKAHASHI ,  Kunihiko SUZUKI ,  Kanta ABE ,  Yuji IWAKI

IPC: H01M4/525 ,  H01M4/36 ,  H01M10/0525 ,  H01M10/0562 ,  H01M10/0585 ,  H01M50/431

Abstract: Provided is a positive electrode for a secondary battery, which has a small change in a crystal structure due to charging and discharging and has excellent cycle performance. The positive electrode for a secondary battery includes n positive electrode active material layers (n is an integer greater than or equal to 2), n−1 separation layer(s), and a positive electrode current collector layer. The positive electrode active material layers and the separation layer(s) are alternately stacked. The positive electrode active material layer contains lithium, cobalt, and oxygen. The separation layer contains a titanium compound. Titanium oxide and titanium nitride are preferable as the titanium compound, and titanium oxide is particularly preferable.

公开(公告)号：US20220344375A1

公开(公告)日：2022-10-27

申请号：US17859054

申请日：2022-07-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kaoru HATANO

IPC: H01L27/12 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/1362 ,  H01L29/24 ,  H01L29/786

Abstract: Provided is a method to manufacture a liquid crystal display device in which a contact hole for the electrical connection of the pixel electrode and one of the source and drain electrode of a transistor and a contact hole for the processing of a semiconductor layer are formed simultaneously. The method contributes to the reduction of a photography step. The transistor includes an oxide semiconductor layer where a channel formation region is formed.

公开(公告)号：US20220328516A1

公开(公告)日：2022-10-13

申请号：US17640549

申请日：2020-09-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hajime KIMURA ,  Hitoshi KUNITAKE

IPC: H01L27/11582 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573

Abstract: A semiconductor device with high storage capacity is provided. The semiconductor device includes first to sixth insulators, first to third conductors, and first to third material layers. The first conductor overlaps with a first insulator and a first material layer. A first region of the first material layer overlaps with a second material layer, a second conductor, a second insulator, and a third insulator. The third material layer is positioned in a region including a second region of the first material layer and top surfaces of the second material layer, the second conductor, the second insulator, and the third insulator; a fourth insulator is positioned over the third material layer; the sixth insulator is positioned over the fourth insulator; and a fifth insulator is positioned over the sixth insulator. The third conductor is positioned over the fifth insulator overlapping with the second region of the first material layer. The first to third material layers include oxide containing indium, an element M (M is aluminum, gallium, tin, or titanium), and zinc.

公开(公告)号：US20220302312A1

公开(公告)日：2022-09-22

申请号：US17642346

申请日：2020-09-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hitoshi Kunitake ,  Yuichi YANAGISAWA ,  Shota MIZUKAMI ,  Kazuki TSUDA ,  Haruyuki BABA ,  Shunpei YAMAZAKI

IPC: H01L29/786

Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first insulator; a first oxide over the first insulator; a second oxide over the first oxide; a first conductor, a second conductor, a third oxide, a fourth oxide, and a second insulator over the second oxide; a third insulator over the first conductor, the second conductor, the third oxide, and the fourth oxide; a fourth insulator over the second insulator; and a third conductor over the fourth insulator. The second insulator is positioned between the first conductor and the second conductor. The third oxide is positioned between the first conductor and the second insulator. The fourth oxide is positioned between the second conductor and the second insulator. The thickness of the third oxide between the first conductor and the second insulator is greater than or equal to 3 nm and less than or equal to 8 nm. The thickness of the fourth oxide between the second conductor and the second insulator is greater than or equal to 3 nm and less than or equal to 8 nm.

公开(公告)号：US20220293641A1

公开(公告)日：2022-09-15

申请号：US17830546

申请日：2022-06-02

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi KOEZUKA ,  Masami JINTYOU ,  Yukinori SHIMA ,  Daisuke KUROSAKI ,  Masataka NAKADA ,  Shunpei YAMAZAKI

IPC: H01L27/12 ,  H01L29/786

Abstract: A semiconductor device including an oxide semiconductor in which on-state current is high is provided. The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. Furthermore, the first transistor and the second transistor are transistors having a top-gate structure. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. The first transistor provided in the driver circuit portion includes two gate electrodes between which the oxide semiconductor film is provided.

公开(公告)号：US20220283661A1

公开(公告)日：2022-09-08

申请号：US17751782

申请日：2022-05-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hajime KIMURA ,  Shunpei YAMAZAKI

IPC: G06F3/041 ,  G06F3/044 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/1368

Abstract: An input/output device includes a first sensor electrode and a second sensor electrode. In addition, the input/output device includes a first electrode and a second electrode which are electrodes for a display element, and a substrate sandwiched between the first sensor electrode and the second sensor electrode. The second sensor electrode is formed concurrently with the first electrode using the same material. The input/output device sensors a change in capacitance of a capacitor formed between the first sensor electrode and the second sensor electrode. Furthermore, a third sensor electrode to which a floating potential is applied may be provided to overlap with the first electrode. In the input/output device, either a liquid crystal element or a light-emitting element may be used, or both the liquid crystal element and the light-emitting element may be used.