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    Image conversion device and method
    141.
    发明申请
    Image conversion device and method 有权

    公开(公告)号：US20060077289A1

    公开(公告)日：2006-04-13

    申请号：US11237958

    申请日：2005-09-29

    Applicant: Young-ho Lee ,  Seung-joon Yang

    Inventor： Young-ho Lee ,  Seung-joon Yang

    IPC: H04N7/01 ,  H04N5/14

    CPC classification number: H04N7/0115 ,  H04N5/145

    Abstract: An image conversion device and method of interpolating an input image by utilizing a motion estimation that is adaptive according to characteristics of the input image. The image conversion device includes a detection block to receive three consecutive input fields including a first field, a second field as a target interpolation field, and a third field, to determine which of the first field and the third field has a smaller difference value of field data with respect to the second field that is an interpolation target field, and to determine whether one of the first and third fields have a motion change that is greater than a predetermined threshold with respect to the second field, and an interpolation block to interpolate the second field by determining a selected motion estimation value between the one of the first and third fields having the smaller difference value and the second field, determining a third motion estimation value between the first field and the third field, applying different weights to the selected and third motion estimation values depending on whether one of the first and second fields have the motion change that is greater than the predetermined threshold, and mixing the weighted selected and third motion estimation values.

    Method of forming patterns for semiconductor device
    145.
    发明授权
    Method of forming patterns for semiconductor device 有权
    形成半导体器件图案的方法

    公开(公告)号：US08697580B2

    公开(公告)日：2014-04-15

    申请号：US13678930

    申请日：2012-11-16

    Applicant: Young-Ho Lee ,  Jae-Hwang Sim ,  Sang-Yong Park ,  Kyung-Lyul Moon

    Inventor： Young-Ho Lee ,  Jae-Hwang Sim ,  Sang-Yong Park ,  Kyung-Lyul Moon

    IPC: H01L21/311

    CPC classification number: H01L23/528 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/31144 ,  H01L21/76229 ,  H01L21/76816 ,  H01L21/76838 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/11519 ,  H01L27/11526 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Provided is a method of forming patterns for a semiconductor device in which fine patterns and large-width patterns are formed simultaneously and adjacent to each other. In the method, a first layer is formed on a substrate so as to cover a first region and a second region which are included in the substrate. Both a blocking pattern covering a portion of the first layer in the first region and a low-density large-width pattern covering a portion of the first layer in the second region are simultaneously formed. A plurality of sacrificial mask patterns are formed on the first layer and the blocking pattern in the first region. A plurality of spacers covering exposed sidewalls of the plurality of sacrificial mask patterns are formed. The plurality of sacrificial mask patterns are removed. The first layer in the first and second regions are simultaneously etched by using the plurality of spacers and the blocking pattern as etch masks in the first region and using the low-density large-width pattern as an etch mask in the second region.

    Abstract translation: 提供一种形成半导体器件的图案的方法，其中精细图案和大幅图案同时并且彼此相邻地形成。 在该方法中，在衬底上形成第一层以覆盖包括在衬底中的第一区域和第二区域。 同时形成覆盖第一区域中的第一层的一部分的阻挡图案和覆盖第二区域中的第一层的一部分的低密度大图案。 在第一层上形成多个牺牲掩模图案，并在第一区域中形成阻挡图案。 形成覆盖多个牺牲掩模图案的暴露侧壁的多个间隔物。 去除多个牺牲掩模图案。 通过使用多个间隔物和阻挡图案作为第一区域中的蚀刻掩模并且在第二区域中使用低密度大宽度图案作为蚀刻掩模，同时蚀刻第一和第二区域中的第一层。

    HYPERTENSION MONITORING AND NOTIFICATION DEVICE BASED ON CONTEXT INFORMATION
    146.
    发明申请
    HYPERTENSION MONITORING AND NOTIFICATION DEVICE BASED ON CONTEXT INFORMATION 审中-公开
    基于上下文信息的高效监控和通知装置

    公开(公告)号：US20140052008A1

    公开(公告)日：2014-02-20

    申请号：US14006270

    申请日：2011-08-12

    Applicant: Jong Hun Kim ,  Young Ho Lee ,  Dong Kyun Park ,  Eun Young Jung

    Inventor： Jong Hun Kim ,  Young Ho Lee ,  Dong Kyun Park ,  Eun Young Jung

    IPC: A61B5/00 ,  A61B5/021

    CPC classification number: A61B5/4866 ,  A61B5/0002 ,  A61B5/021 ,  A61B5/7246 ,  A61B5/7278 ,  A61B5/742 ,  G16H50/20

    Abstract: Disclosed is a hypertension monitoring and notification device based on context information, which includes a data gain and storage unit for storing bio information of a user, context data, and weather and health information; a user context analysis unit for deducing context information of the user from the bio information and the context data to analyze context necessary for measuring hypertension; a specific hypertension analysis unit for analyzing specific hypertension using the context information; a blood pressure grade analysis unit for determining a blood pressure grade via the analyzed context information to deduce blood pressure signal light information and to transmit a recommendation content; and a result output and notification unit for outputting and notifying the user and the doctor of the bio information, the blood pressure signal light information, the specific hypertension information, and the context information.

    Abstract translation: 公开了一种基于上下文信息的高血压监测和通知装置，其包括用于存储用户的生物信息的数据增益和存储单元，上下文数据以及天气和健康信息; 用户背景分析单元，用于从所述生物信息和所述上下文数据推断所述用户的上下文信息，以分析测量高血压所需的上下文; 使用上下文信息分析特定高血压的特异性高血压分析单元; 血压等级分析单元，用于经由所分析的上下文信息来确定血压等级，以推断血压信号光信息并传送推荐内容; 以及用于输出和通知用户和医生生物信息，血压信号光信息，特定高血压信息和上下文信息的结果输出和通知单元。

    Semiconductor devices having dual trench, methods of fabricating the same, and electronic system having the same
    147.
    发明授权
    Semiconductor devices having dual trench, methods of fabricating the same, and electronic system having the same 有权
    具有双沟槽的半导体器件及其制造方法以及具有该半导体器件的电子系统

    公开(公告)号：US08519484B2

    公开(公告)日：2013-08-27

    申请号：US13368556

    申请日：2012-02-08

    Applicant: Dong-Won Kim ,  Jae-Hwang Sim ,  Keon-Soo Kim ,  Young-Ho Lee

    Inventor： Dong-Won Kim ,  Jae-Hwang Sim ,  Keon-Soo Kim ,  Young-Ho Lee

    IPC: H01L21/70

    CPC classification number: H01L21/76229

    Abstract: A semiconductor device having a dual trench and methods of fabricating the same, a semiconductor module, an electronic circuit board, and an electronic system are provided. The semiconductor device includes a semiconductor substrate having a cell region including a cell trench and a peripheral region including a peripheral trench. The cell trench is filled with a core insulating material layer, and the peripheral trench is filled with a padding insulating material layer conformably formed on an inner surface thereof and a core insulating material layer formed on an inner surface of the padding insulating material layer. The core insulating material layer has a greater fluidity than the padding insulating material layer.

    Abstract translation: 提供具有双沟槽的半导体器件及其制造方法，半导体模块，电子电路板和电子系统。 半导体器件包括具有包括单元沟道的单元区域和包括外围沟槽的周边区域的半导体衬底。 电池沟槽填充有芯绝缘材料层，并且周边沟槽填充有在内表面上顺应地形成的填充绝缘材料层和形成在填充绝缘材料层的内表面上的芯绝缘材料层。 芯绝缘材料层具有比填充绝缘材料层更大的流动性。

    Semiconductor device having resistive device
    148.
    发明授权
    Semiconductor device having resistive device 有权
    具有电阻器件的半导体器件

    公开(公告)号：US08344346B2

    公开(公告)日：2013-01-01

    申请号：US13073521

    申请日：2011-03-28

    Applicant: Seung Beom Baek ,  Ja Chun Ku ,  Young Ho Lee ,  Jin Hyock Kim

    Inventor： Seung Beom Baek ,  Ja Chun Ku ,  Young Ho Lee ,  Jin Hyock Kim

    IPC: H01L29/02 ,  H01L29/06 ,  G11C11/00

    CPC classification number: H01L27/249 ,  H01L27/2409 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1226 ,  H01L45/144 ,  H01L45/146

    Abstract: A semiconductor memory device includes a plurality of word lines vertically formed on a surface of a semiconductor substrate, where each pair of the plurality of word lines form a set of word lines, a bit line formed parallel to the surface of the semiconductor substrate and disposed in plurality stacked between the word lines of each pair constituting the one set of word lines, and unit memory cells disposed between respective ones of the bit lines and an adjacent one of the pair of word lines of said one of the word line sets.

    Abstract translation: 半导体存储器件包括垂直形成在半导体衬底的表面上的多个字线，其中每对多条字线形成一组字线，平行于半导体衬底的表面形成的位线， 多个堆叠在构成所述一组字线的每一对的字线之间，以及设置在所述一个字线组中的所述位线中的相应位线与所述一对字线中的相邻一个之间的单元存储单元。

    Semiconductor devices having dual trench, methods of fabricating the same, and electronic system having the same
    150.
    发明授权
    Semiconductor devices having dual trench, methods of fabricating the same, and electronic system having the same 有权
    具有双沟槽的半导体器件及其制造方法以及具有该半导体器件的电子系统

    公开(公告)号：US08129238B2

    公开(公告)日：2012-03-06

    申请号：US12951490

    申请日：2010-11-22

    Applicant: Dong-Won Kim ,  Jae-Hwang Sim ,  Keon-Soo Kim ,  Young-Ho Lee

    Inventor： Dong-Won Kim ,  Jae-Hwang Sim ,  Keon-Soo Kim ,  Young-Ho Lee

    IPC: H01L21/8242

    CPC classification number: H01L21/76229

    Abstract: A semiconductor device having a dual trench and methods of fabricating the same, a semiconductor module, an electronic circuit board, and an electronic system are provided. The semiconductor device includes a semiconductor substrate having a cell region including a cell trench and a peripheral region including a peripheral trench. The cell trench is filled with a core insulating material layer, and the peripheral trench is filled with a padding insulating material layer conformably formed on an inner surface thereof and a core insulating material layer formed on an inner surface of the padding insulating material layer. The core insulating material layer has a greater fluidity than the padding insulating material layer.

    Abstract translation: 提供具有双沟槽的半导体器件及其制造方法，半导体模块，电子电路板和电子系统。 半导体器件包括具有包括单元沟道的单元区域和包括外围沟槽的周边区域的半导体衬底。 电池沟槽填充有芯绝缘材料层，并且周边沟槽填充有在内表面上顺应地形成的填充绝缘材料层和形成在填充绝缘材料层的内表面上的芯绝缘材料层。 芯绝缘材料层具有比填充绝缘材料层更大的流动性。

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